The Generalized Metastable Switch Memristor Model
Memristor device modeling is currently a heavily researched topic and is becoming ever more important as memristor devices make their way into CMOS circuit designs, necessitating accurate and efficient memristor circuit simulations. In this paper, the Generalized Metastable Switch (MSS) memristor model is presented. The Generalized MSS model consists of a voltage-dependent stochastic component and a voltage-dependent exponential diode current component and is designed to be easy to implement, computationally efficient, and amenable to modeling a wide range of different memristor devices.
Many memristive materials have recently been reported, and the trend continues. Memristor models are also being developed and incrementally improved upon , however most models to date have shortcomings, especially when used to model the type of devices we are interested in using to build neuromorphic processors such as Thermodynamic-RAM . Additionally, most memristors seemingly display some measure of stochastic behavior, while most models assume a deterministic device. Naous et al. recently proposed another model, which can add stochasticity to any existing model . We felt that a stochastic model built from the ground up was a more natural fit to actual devices and designed it to satisfy several requirements: (1) It should accurately model the device behavior including stochastics, (2) it should be computationally efficient, (3) and it should model as many different devices as possible.∫
2Generalized MSS Model
In our proposed semi-empirical model, the “generalized metastable switch (MSS) memristor model”, the total current through the device comes from both a memory-dependent current component, , and a Schottky diode current, in parallel:
, where . A value of represents a device that contains no Schottky diode effects. The Schottky component, , follows from the fact that many memristive devices contain a Schottky barrier formed at a metal–semiconductor junction. The Schottky component is modeled by forward bias and reverse biased components as follows:
, where , , , and are positive valued parameters setting the exponential behavior of the forward and reverse exponential current flow across the Schottky barrier.
The memory component of our model, , arises from the notion that memristors can be represented as a collection of conducting channels that switch between 2 states of differing resistance. Modification of device resistance is attained through the application of an external voltage gradient that causes the channels to transition between high and low conducting states. As the number of channels increases, the memristor will become more incremental as it acquires the ability to access more states. We treat each channel as a metastable switch (MSS) and the conductance of a collection of metastable switches captures the memory effect of the memristor.
The probability that a single MSS will transition from the B state to the A state is given by , while the probability that the MSS will transition from the state to the state is given by . The transition probabilities are modeled as:
, where . Here, is the thermal voltage and is equal to approximately at , is the ratio of the time step period to the characteristic time scale of the device, , and is the voltage across the device. The probability is defined as the positive-going direction, so that a positive applied voltage increases the chances of occupying the A state. Each switch has an intrinsic electrical conductance given by and . The convention is that . Note that the logistic function is similar to the hyperbolic-sign function used in other memristive device models. Our use of the logistic function follows simply from the requirement that probabilities must be bounded between 0 and 1.
Up until this point we have only considered a single MSS being in the or state and its probability of it changing states given external stimuli. We now model a memristor as a collection of MSSs evolving in discrete time steps, . The total memristor conductance is given by the sum over each MSS:
, where is the number of MSSs in the A state, is the number of MSSs in the state and are the intrinsic conductances of the MSSs respectively. At each time step some subpopulation of the MSSs in the state will transition to the state, while some subpopulation in the B state will transition to the A state. Since the model keeps track of the number of switches in each state, it can easily determine the entire device’s conductance by a sum of products.
The probability that MSSs will transition out of a population of MSSs is given by the binomial distribution, and as becomes large we may approximate the binomial distribution with a normal distribution:
, where and . Therefore at each time step we have two normal distributions defined by , , and , which is a function of instantaneous voltage, , the time step, , of the simulation and the temperature, , of the device. These two distributions can be sampled to get a random number of MSSs switching their states, where and are the number of switches transitioning states.
The change in the memristor conductance is thus given by:
, and the memory-dependent current is thus:
, where is the voltage across the memristor during the time-step.
3Results and Discussion
Figure 1 shows the hysteresis curve of a fitted model for a raw Tungsten Ag-chalcogenide device data driven at 500 Hz with a sinusoidal voltage of 0.5 V amplitude. Reducing the number of MSSs in the model reduces the averaging effects and causes the memristor to behave in a more stochastic way. Note that as the number of MSSs becomes small, the normal approximation to the binomial distribution also breaks down. In this case, one could use the binomial distribution directly if so desired. An addition of a Schottkey diode current response seen in many memristor devices is illustrated by changing , , and .
The generalized metastable switch memristor model presented does an excellent job at modeling the hysteresis behavior of a W-Ag-chalcogenide device with a quick manual fitting procedure. Not shown here is additional satisfactory modelling under a diverse set up simulations: triangle drive waveforms, pulses, positive and negative voltages, two devices connected in series, and additional memristor types. Future work includes porting the model over to Verilog and SPICE. Source code for the model and simulations is available upon request.
The authors would like to thank the Air Force Research Labs in Rome, NY for their support under the SBIR/STTR programs AF10-BT31, AF121-049. The authors would like to thank Kristy A. Campbell from Boise State University for graciously providing us with memristor device data.
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