The effect of split gate size on the electrostatic potential and 0.7 anomaly within one-dimensional quantum wires on a modulation doped GaAs/AlGaAs heterostructure

The effect of split gate size on the electrostatic potential and 0.7 anomaly within one-dimensional quantum wires on a modulation doped GaAs/AlGaAs heterostructure

Abstract

We study 95 split gates of different size on a single chip using a multiplexing technique. Each split gate defines a one-dimensional channel on a modulation-doped GaAs/AlGaAs heterostructure, through which the conductance is quantized. The yield of devices showing good quantization decreases rapidly as the length of the split gates increases. However, for the subset of devices showing good quantization, there is no correlation between the electrostatic length of the one dimensional channel (estimated using a saddle point model), and the gate length. The variation in electrostatic length and the one-dimensional subband spacing for devices of the same gate length exceeds the variation in the average values between devices of different length. There is a clear correlation between the curvature of the potential barrier in the transport direction and the strength of the “0.7 anomaly”: the conductance value of the 0.7 anomaly reduces as the barrier curvature becomes shallower. These results highlight the key role of the electrostatic environment in one-dimensional systems. Even in devices with clean conductance plateaus, random fluctuations in the background potential are crucial in determining the potential landscape in the active device area such that nominally identical gate structures have different characteristics.

I Introduction

Low dimensional systems are platforms for research into a variety of quantum behavior. However, the broader application of such devices in an engineering context is limited due to unpredictable local variations in the electrostatic landscape in the device’s active area. When considering their practical application it is important to study the statistical spread in device characteristics. We have previously studied identical devices fabricated on a modulation doped heterostructure which show variations in their conductance properties (1). In this paper we investigate the effect of gate size on two important quantum properties of split gate devices–the conductance quantization (2); (3) and the occurrence of 0.7 anomaly (4).

The split gate is the simplest mesoscopic device that can be used to study how device behavior is affected by gate size. The conductance through a split gate (5) is quantized in multiples of as a function of the voltage applied to the gates (2); (3), due to the formation of one-dimensional (1D) subbands. For an ideal 1D conductor, this does not depend on the length as long as transport remains ballistic. The effect of split gate size can be investigated either by varying lithographic dimensions (6); (7); (8); (9), or fabricating several split gates in close-proximity which act in series to modify the potential of a single 1D channel (10); (11); (12); (13). So far it has been shown that the split-gate voltage () at which the conductance through the 1D channel is pinched off occurs closer to zero for longer and narrower devices (6); (7). Additionally, the quality of conductance quantization degrades as the gate length increases (14); (9). This latter effect is related to the higher probability of encountering an impurity in the channel with longer/wider split gates, and fluctuations in the background disorder potential which modifies the potential landscape in the channel area.

Some studies of the effect of split gate size have focused on the 0.7 anomaly (7); (8); (11), a conductance feature which occurs near  (4); (15); (16) which arises from enhanced electron interactions at low conductance. A reduction in the conductance of the 0.7 anomaly for longer split gates has been reported (8). Another study using split gates in series has shown periodic modulations in the value of the 0.7 anomaly as a function of 1D channel length (11). The origin of the 0.7 anomaly is currently debated, theories proposed for its occurrence include spontaneous spin polarization (4); (17), the Kondo effect (18); (19); (20); (11), Wigner crystallization (21); (22), and inelastic scattering plus the local enhancement (smeared van Hove singularity) of the 1D density of states (23); (24).

We use a multiplexing scheme (26); (1); (27); (28); (29); (30) to measure 95 split gates of 7 different sizes on a GaAs/AlGaAs modulation-doped heterostructure. This is the first study of the impact of split gate dimensions using data obtained from a large number of split gates fabricated on a single chip and measured during one cool down. The array contains groups of devices, where the dimensions of each split gate in the group are the same, and dimensions are changed between groups. Measuring groups in this way provides enough statistical information to determine typical device properties.

Our technique allows us to compare incremental changes in gate design. This is important in the context of device developement, for example if it is necessary to design a device with a specific set of operating parameters, or find ways of improving a particular design. The traditional approach to nanostructure measurement require many cool downs to build up the statistical information that we obtain in a single cool down.

We systematically compare the accuracy of conductance quantization between split gates of different dimension, and find a rapid reduction in quality of quantization as gate length increases. We obtain average values of pinch off voltage and definition voltage as a function of gate length and width which show how the pinch off voltage occurs closer to zero for longer and narrower split gates, as expected from electrostatics (31). For longer gates the voltage at which the 1D channel is defined also occurs closer to zero, and the 1D subband spacing reduces.

A key finding of this paper is that the background disorder potential is at least as important as the split gate dimension in governing the potential landscape in the 1D channel. This is shown in three separate ways. Firstly, the spread in both the measured 1D subband spacing and the estimated 1D barrier curvature for split gates at fixed gate lengths exceed variations in the mean value of these parameters between devices of different length. Secondly, the strength of coupling between the split gates and the 1D channel does not monotonically increase with device length. A monotonic increase is expected if one only considers the electric field generated by the gates themselves. Thirdly, changes in the 1D barrier curvature from device to device–which indicates the length of the 1D channel–do not depend on split gate length.

We also directly compare the 0.7 anomaly in devices of different gate length. This is possible since–for a non-interacting system–the shape of the conductance trace depends on . We use a technique developed in Ref. (29) to remove the trivial geometric dependence from the conductance data, leaving differences that are only due to electron interactions. Our data are consistent with Ref. (29) in that the 0.7 anomaly occurs at lower conductance values for devices with a shallower longitudinal barrier. However, the present dataset is gathered from devices of different dimensions (data in Ref. (29) are from lithographically identical gates). By obtaining the same result from devices with various dimensions we show that the electrostatic length of the 1D channel is the decisive factor governing the conductance of the 0.7 anomaly.

Ii Methods

Our data are obtained from 95 split gates of various dimensions located within a single array (of total area mm). Two widths were chosen, and m [the dimensions are indicated on a schematic diagram of a split gate in Fig. 1(a)]. For both widths, 15 devices of each length were measured, where , , and m. One of the devices did not define a 1D channel ( m). A further 6 devices with m were also measured.

The sample is fabricated on a GaAs/AlGaAs heterostructure in which the 2DEG forms 90 nm below the surface of the wafer, separated from a 40 nm wide Si-doped AlGaAs layer by 40 nm of undoped AlGaAs. The carrier density and mobility are cm and cmVs, respectively, determined by measuring a Hall bar on a nearby piece of the wafer. The electron mean free path is 22 m.

The split gates are defined by electron-beam lithography. Other surface gates are defined by optical lithography, and all gates are metallized by thermally evaporating Ti/Au. A two-terminal, constant voltage technique is used to measure the differential conductance through the split gates as a function of gate voltage, using an ac excitation voltage of 100 V at 17 Hz. All measurements are carried out at 1.4 K and T.

The device measured here is different to that used in our previous work on multiplexed split gates (26); (1); (27); (29). The earlier work used an array of identical split gates, where both the length and width were 0.4 m. The multiplexed array measured here contains split gates of 7 different length/width combinations and is fabricated on a higher mobility heterostructure. This paper presents a self-contained story of the influence (or lack thereof) of gate length on conductance in 1D devices. We investigate the effect of split gate dimensions on device yield, 1D conductance properties, the electrostatic potential profile and the 0.7 anomaly. Such a systematic study on many split gates with different dimensions and measured under identical conditions is the first of its kind.

Figure 1: (a) Typical trace of conductance as a function of the voltage applied to the split gate . The vertical and horizontal dotted lines indicate the 1D definition voltage () and conductance (), respectively. The left-hand arrow indicates pinch-off voltage . The inset shows a schematic split gate device with dimensions and labeled. Source and drain ohmic contacts are marked S and D, respectively. (b) Scatter plot of pinch-off voltage as a function of split-gate length . The triangles (circles) represent data from devices of width () m. The diamonds and error bars show the mean and standard deviation for each , respectively, offset horizontally by m for clarity. Panels (c) and (d) show as a function of , for and m, respectively.
Figure 2: Percentage of devices showing clean quantization as a function of split-gate length . Panels (a) and (b) show data for widths and m, respectively. The triangles (circles) indicate devices for which the first and second (first, second, and third) plateaus occur within , after correcting for series resistance.

Iii Conductance properties as a function of split gate size

iii.1 Electrical properties

We begin by investigating the effect of split gate length and width on the definition voltage and pinch-off voltage . Figure 1(a) shows a typical plot of the conductance as a function of the voltage applied to the split gate . A 1D channel is formed when the 2DEG beneath the gates is fully depleted, indicated by a sudden change in the gradient of the conductance trace [corresponding to voltage and conductance in Fig. 1(a)]. As decreases further the conductance reduces (showing a series of plateaus) until the channel is completely pinched off (marked by ).

Figure 1(b) shows a scatter plot of against , in which the triangles (circles) represent data for () m. The diamonds/error bars show average values/standard deviation for each . Both sets of data show becoming closer to zero with increasing (7); (6). The trend is more pronounced for m, where is nearly double that of m. These trends arise from simple electrostatics, since for a given , the electric field is stronger in the center of the channel for longer and narrower split gates (31). An additional effect also occurs: a longer wire is more likely to be affected by fluctuations in the background disorder potential due to ionized donors. This can modify the confining potential and therefore . The larger spread in for m may reflect the increased role of disorder. However, the spread as a percentage of the mean is similar for both .

Figures 1(c) and (d) show against for and m devices, respectively. In both cases the magnitude of reduces as increases, which can be attributed to the higher electric field strength in the center of the channel for longer devices. For each , the range and average values of are similar for both widths.

iii.2 Yield

We investigate the role of disorder as a function of device length/width. The values of conductance plateaus are used to define a yield criterion, since when disorder affects the transmission through a 1D channel the conductance plateaus deviate from expected values. For systematic analysis the data are first corrected for series resistance () using at V (i.e. the open-channel resistance). Two cases (A and B) are considered. Case A follows Ref. (26) and requires the first two conductance plateaus to occur within . Case B extends this to include the third plateau.

Figures 2(a) and 2(b) show the number of devices which pass the yield criterion as a function of , for and m, respectively. Triangles and circles indicate devices which passed for cases A and B, respectively. Fewer devices show accurate conductance quantization as or increases (14); (9), due to the increased likelihood of encountering impurities in the 1D channel and greater variation in the background potential. Including the third plateau in the analysis gives a stricter yield criterion and leads to a lower yield.

The specific form of the relationship between yield and length in Fig. 2 is not clear: it is necessary to measure more than 15 devices of each to obtain this information. This is an interesting avenue for future research since finding the exact nature of the correlation between yield and length may provide information about disorder correlation lengths or dominant disorder effects in the 1D channel.

Figure 3: (a) Grayscale diagram of the transconductance as a function of and source-drain bias , from a typical device with dimensions . Black (white) regions correspond to high (low) transconductance, i.e. transitions between plateaus (the plateaus themselves). The 1D subband spacings are estimated by the crossings of peaks in the transconductance (33), highlighted by dashed lines. Subband spacing is labeled for illustrative purposes. (b) Cumulative 1D subband spacings as a function of pinch-off voltage . The blue, red, and green symbols correspond to , , and , respectively. Unique symbols represent devices of each size, as described in the legend. The error bounds show the cumulative error in the estimate. (c)-(e) Scatter plots of against for , and , respectively (to avoid confusion the error bars on individual data points are not shown). The diamonds show the average for each (offset horizontally by 0.1 m for clarity), and error bounds indicate the average error.

Iv Dependence of the electrostatic potential landscape on gate length

Having characterized the length- and width-dependence of two electrical properties of the 1D conductance trace ( and ), we now consider the length-dependence of the potential profile for a subset of devices. We first investigate the transverse confining potential by extracting the 1D subband spacing (33). We then study the longitudinal potential by estimating the curvature of the barrier in the direction of electron transport (1). The following measurements and analysis are performed using devices with m, since a higher percentage of split gates with m were affected by disorder.

iv.1 DC bias spectroscopy

DC bias spectroscopy is used to measure the 1D subband spacing (33) for 18 split gates. Figure 3(a) shows an example grayscale plot of the transconductance as a function of source-drain bias and (dark/light regions correspond to high/low transconductance). The data are corrected for series resistance following the procedure outlined in the supplementary material of Ref. (34).

As increases, dark regions representing peaks in the transconductance diverge into two (highlighted by the dashed lines), corresponding to the bottom of the 1D subband reaching either the source or drain chemical potential (35). Two lines cross when is equal to the energy difference between consecutive 1D subbands, giving the 1D subband spacing ( is the subband index). For example, is marked in Fig. 3(a).

Figure 3(b) shows cumulative 1D subband spacings as a function of for 18 devices. The spacing between the first and second (), first and third (), and first and fourth () subbands are shown (unique symbols represent devices of different , described in the legend).

In each case reduces as becomes closer to zero. We plot the cumulative data to better accentuate this trend, although the spacing between consecutive subbands [shown in Figs. 3(c)–(e)], all show a downward trend with . The trend can be attributed to the weakening of the electric field at pinch off for smaller , since this leads to shallower confinement and therefore closer subband spacings.

Figures 3(c)-(e) show individual 1D subband spacings as a function of . Panels (c), (d), and (e) show , , and , respectively. The diamonds represent average values for each (offset horizontally for clarity), and error bounds show the average error for each  (36). The average subband spacing reduces with in agreement with electrostatic modeling of a saddle point potential (7); (31). However, the spread in for individual values of is larger than or similar to the average change in across all values of . Since variations in device characteristics likely arise from fluctuations in the background potential, these data highlight the importance of unique electrostatic environment near each split gate. They suggest that backgound variations are as significant as the lithographic dimensions in governing the potential landscape in the device active area.

iv.2 Coupling between the split gate and the 1D channel

Figure 4: (a), (b) Lever arm as a function of lithographic length and 1D subband spacing , respectively. The diamonds in panel (a) represent the mean for each (offset by 0.1 m for clarity), and the error bars indicate the average error. (c) Experimentally measured conductance as a function of split-gate voltage , for an example device (solid line). The dashed line shows a fit to the data using a modified saddle-point model. The transition between plateaus gives an estimate of barrier curvature . (d) Characteristic length of the potential barrier as a function of gate length . The diamonds and error bars represent the average value and the average error, respectively (offset by 0.1 m for clarity). (e) Curvature of the potential barrier as a function of .

The degree of coupling between the split gate and the 1D channel is given by lever arm , where (estimated from DC bias spectroscopy measurements). Figure 4(a) shows (the lever arm for the first subband), as a function of for 18 split gates. The diamonds indicate the average value, offset horizontally for clarity. The error bounds indicate the average error (36).

The lever arm almost doubles between and m. This trend is expected since scales with , which, for a given , will be larger in the center of a channel formed by a longer gate. However, as increases further, reduces, deviating from the expected trend. This also occurs for subbands 2 and 3.

A length of m is consistent with the correlation length of fluctuations in the background potential. In Ref. (37), calculations of the effect of potential fluctuations in the 2DEG on split gate devices are performed, for a heterostructure with a similar donor density to the one measured here (38). The fluctuations were assumed to arise from the random positioning of donors in the doped layer. The correlation length of these fluctuations was found to be comparable with the device active area for split gate lengths of 0.2 and 0.6 m. Our data show depends on split gate length up to m, which may suggest the correlation length of potential fluctuations is slightly greater than this value for the heterostructure used in our experiment.

Figure 4(b) shows as a function of . Data from each length split gate are represented using different symbols, described in the legend. Overall, no trend is apparent. Data from the same length devices appear to be grouped, and a weak positive correlation exists for the m data. This does not occur for longer devices, consistent with the increased effect of disorder.

iv.3 Curvature of the 1D potential barrier

We now estimate the curvature of the potential barrier in the transport direction by assuming the confining potential is described by a saddle-point model (25). We achieve this by fitting the measured data with a conductance calculated using the Landauer-Büttiker formalism (1); (29), simulating a system of non-interacting electrons traversing a saddle-point potential with transmission probability , where is the energy of the bottom of subband . The saddle-point approximation can be used for the first few subbands even for devices with a large length-to-width ratio, since is governed by transmission through the narrowest part of the channel.

Figure 4(c) shows measured conductance (solid line) and the fit (dashed line) for an example device, as a function of . The fit is achieved as follows: Transmission probability is calculated for the first three subbands individually as function of , using an initial input of . Subband-dependent lever arms measured for each device individually are used to convert to a voltage scale. A minimization routine then optimizes to find the best fit between the calculated and measured traces. The use of subband-dependent values of reflects how the barrier profile for higher subbands is modified by the increased presence of electrons. The sum of for , 2 and 3 gives the final trace shown by the dashed line in Fig. 4(c).

The transition between and is almost independent of temperature up to at least (4). Therefore, for the fit is performed with , such that the calculated conductance . For higher subbands a temperature dependence is observed experimentally, therefore for and 3 we calculate at K using

(1)

where is the Fermi-Dirac distribution. We find that using either or for does not affect the trends observed (29).

Good fits are obtained for 11 of the 18 split gates. For the other seven devices, conductance plateaus are weakened or suppressed due to strong disorder effects, therefore these data are discarded in the following analysis. The saddle-point model assumes a parabolic potential barrier, which has a characteristic length , where is the effective mass of the electrons. Barrier length is therefore the distance over which the potential changes by .

Figure 4(d) shows as a function of . Diamonds show the average for each , and error bounds indicate the average error, offset horizontally for clarity. We would expect the barrier length to scale with the gate length. However, our data show the opposite trend with initially reducing for from to m. This change is very small compared to the change of : nm (a decrease of ), as increases by . As increases further, then increases slightly. For our devices therefore, the split gate length is not a good indicator of the length of the potential barrier.

For , 0.7 and 1 m, the spread of at fixed is larger than or similar to the overall change in average as varies. This highlights the crucial importance of the background potential in determining the electrostatic landscape in the active device area, even between devices with nominally identical length. This is further supported by Fig. 4(e), which shows as a function of . For a given , there is no correlation between these parameters. The trends for subbands 2 and 3 are similar.

Figure 5: (a) Fitted conductance for the first 1D subband from 11 devices. Data are collapsed onto a universal curve by aligning with , then scaling by . (b) Corresponding experimentally-measured conductance , where the data are offset and scaled using the same parameters as (a). For the traces collapse onto a similar curve. Above , variations arise due to the differences in the 0.7 anomaly. (c) as a function of barrier curvature , at fixed values of the scaled voltage axis . From bottom-to-top, increases from to in steps of [corresponding to vertical dashed lines, left-to-right, in panel (b)]. The dashed lines show a linear least squares fit to for each value of , as a guide to eye. (d) Conductance as a function of spacing between the first and second 1D subbands . In panels (c)–(d), data points for each length split gate are indicated by the symbols defined in the legend.

V 0.7 anomaly in different length split gates

In this section 0.7 anomalies from devices of different gate length are compared. Following Bauer et al. (24), we refer to the conductance between and as the ‘sub-open’ regime. Additionally, we refer to experimentally measured (fitted) conductance data as ().

Direct comparison of the 0.7 anomaly between devices is possible by removing the trivial – that which can be accounted for in a non-interacting scenario (25) – dependence of the conductance transition between and on barrier curvature. This is achieved by offseting the conductance traces horizontally to align to and scaling each axis by (29). Differences in conductance that remain are only due to electron interactions. The strength of these interactions still depends on barrier shape (23); (24).

Figure 5(a) shows the fitted conductance for the first subband as a function of the scaled voltage axis . Data from all 11 split gates are plotted. The traces collapse onto a universal curve since these data are obtained using a a non-interacting model. Figure 5(b) shows the corresponding data after applying the same scaling procedure. For , the traces collapse onto a very similar curve. For , differences occur due to the 0.7 anomaly (a spread in arises due to the different ). The variation in the 0.7 anomaly between traces is related to the varying barrier curvature from device to device.

In order to compare the 0.7 anomaly between devices, is plotted as a function of in Fig. 5(c), for 6 fixed values of . From bottom-to-top, increases from -0.5 to 0.75 in steps of 0.25 [corresponding to the vertical lines in Fig. 5(b)]. For , and , is independent of . This is expected since is below or close to . Unique symbols are used to represent data from split gates of each length. The dashed lines are linear fits as a guide to the eye (43).

In the sub-open regime reduces with decreasing . This is consistent with our previous work (29). However, in Ref. (29) an array of identical length split gates was measured in which differences in the electrostatic profile between devices arose only from variations in the background potential. In Fig. 5(c) data from split gates of different length all follow the same trend line for a given . This implies that the profile of the longitudinal barrier–rather than the gate length–is the most significant factor governing the conductance value of the 0.7 anomaly.

The data in Fig. 5 are presented in a similar way to Fig. 2 of Ref. (29) for ease of comparison. We emphasize that these are entirely different datasets, from separate devices. The similarity arises because the same technique developed in Ref. (29) to analyze the 0.7 anomaly is applied here.

The importance of device-specific confining potential has been highlighted in Ref. (42), which summarizes numerous studies of the 0.7 anomaly as a function of carrier density. The conductance of the 0.7 anomaly has been seen to both increase and decrease as a function of carrier density. These conflicting trends likely arise due to the extreme sensitivity of the 0.7 anomaly to differences in the electrostatic potential between devices (42).

The trend in Fig. 5(c) is also consistent with the split-gate length dependence reported in Ref. (8). The 0.7 anomaly occurred at lower values as gate length increased (three devices 0, 0.5 and 2 m long were measured). A stronger link between the longitudinal profile and gate length may exist for devices measured in Ref. (8) because they are fabricated on an undoped heterostructure (44), where the absence of dopants may lead to smaller variations in the background potential.

Calculations of the conductance transition between zero and using the inelastic scattering model plus the local density of states enhancement (23); (24) predict a lowering of the conductance in the sub open regime as decreases. These calculations are shown in Fig. S14(b) in supplementary material of Ref. (24), and are in agreement with our data. Unfortunately, our data do not allow us to distinguish between theories for the occurrence of the 0.7 anomaly since the same trend is predicted in both the spontaneous spin polarization (40) and Kondo scenarios (41) (this is discussed in more detail in Ref. (29)). However, the inelastic scattering scenario is the only theory for which detailed calculations have been performed as a function of .

Figure 5(d) shows as a function of 1D subband spacing . There is a slight reduction of with increasing in the sub-open regime, although the trend is weak. As seen in Fig. 2(b), a larger occurs for devices with a more negative pinch off voltage. This suggests a possible explanation for the trend in Fig. 5(d): the strength of transverse confinement is stronger for the devices with larger , leading to an increase of strength of electron interactions, thus affecting the conductance value of the 0.7 anomaly. This may be understood within the framework of the inelastic scattering model, which makes predictions of the effect of electron interaction strength on the conductance of the 0.7 anomaly. For example, Fig. S14(c) of supplementary material for Ref. (24) shows a reduction of the conductance in the sub-open regime with increasing interaction strength, for a constant barrier curvature. As a final point of interest, the trends in Figs. 5(c) and 5(d) do not depend on the split gate length, compatible with the inelastic scattering model which is based purely on the shape of the potential barrier.

Vi Conclusion

We have systematically studied the effect of changing split gate size on device behavior. This is achieved using a multiplexing technique which allows many nanostructure devices to be compared on a single cooldown. Multiple devices of each size are measured, providing statistical information on the variance of conductance properties between individual designs. In total, we measured 95 split gates with 7 different length/width combinations. Increasing the gate length and/or reducing the width moves the average voltage required to define a 1D channel and the pinch off voltage closer to zero. The 1D subband spacing also reduces for devices with longer gates. Further, the percentage of devices displaying accurate quantization of conductance reduces dramatically as the area of the channel increases.

The electrostatic environment in the 2DEG is very influential on the 1D potential profile. The significance of the background potential is highlighted by three key results reported here. Firstly, the spread in values of the 1D subband spacing and the 1D barrier curvature for a given gate length are as large as the overall variation in the average values of these properties over the range of gate lengths measured. Secondly, the lever arm which depends on the coupling between the gate and the 1D channel does not continue to increase as a function of gate length beyond m, a deviation from the expected result. Thirdly, the curvature of the longitudinal potential barrier estimated using a saddle-point model is not strongly related to gate length.

These results imply that i) gate size cannot be relied upon as a good indicator of the length of the 1D channel, and ii) the background disorder potential is at least as significant as gate size in determining the potential landscape in the 1D channel.

The 0.7 anomaly is compared between split gates of different length. The conductance value of the 0.7 anomaly reduces as the barrier curvature becomes shallower, rather than depending specifically on the split gate length. The particular confining potential in each device, and principally the barrier curvature, may be the primary factor governing the conductance of the 0.7 anomaly at a given temperature and magnetic field.

This study has characterized split gates on a modulation doped GaAs/AlGaAs heterostructure. A potential avenue for future work is to perform measurements on undoped heterostructures where the absence of Si donors results in a reduction of background disorder (45), leading to more reproducible behavior both between split gate devices (47); (46) and after thermal cycling (48). Measuring an array of devices on an undoped structure may also give insight on the degree to which disorder affects nanostructures fabricated on undoped heterostructures (49).

Vii Acknowledgements

This work was supported by the Engineering and Physical Sciences Research Council Grant No. EP/I014268/1. The dataset for this article is available at www.repository.cam.ac.uk/handle/1810/249174. The authors thank A. R. Hamilton, J. von Delft, S. Ludwig, and E. T. Owen for helpful discussions, and R. D. Hall for e-beam exposure.

Present address: Department of Physics, University of Wisconsin-Madison, Madison, WI 53706, United States.

Department of Electronic Electrical Engineering, University of Sheffield, Sheffield, S1 3JD, United Kingdom.

Corresponding author: luke.smith@wisc.edu

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