Multiplexed Charge-locking Device for Large Arrays of Quantum Devices
We present a method of forming and controlling large arrays of gate-defined quantum devices. The method uses a novel, on-chip, multiplexed charge-locking system and helps to overcome the restraints imposed by the number of wires available in cryostat measurement systems. Two device innovations are introduced. Firstly, a multiplexer design which utilises split gates to allow the multiplexer to divide three or more ways at each branch. Secondly we describe a device architecture that utilises a multiplexer-type scheme to lock charge onto gate electrodes. The design allows access to and control of gates whose total number exceeds that of the available electrical contacts and enables the formation, modulation and measurement of large arrays of quantum devices. We fabricate devices utilising these innovations on n-type GaAs/AlGaAs substrates and investigate the stability of the charge locked on to the gates. Proof-of-concept is shown by measurement of the Coulomb blockade peaks of a single quantum dot formed by a floating gate in the device. The floating gate is seen to drift by approximately one Coulomb oscillation per hour.
Motivation for the measurement of large numbers of quantum devices arises both from interest in the associated physical properties such as the formation of minibandsminiband () and from the drive to up-scale and integrate quantum phenomenon, such as spin physicshanson spins (), into future technology and quantum information processingloss (). Much of the physics of interest is only observable using cryogenic systems and the number of coupled devices is limited by the number of available contacts. Recent work has shown the use of multiplexing to greatly increase the number of isolated quantum devices available for measurement on a single chip and single cool-downhaider1 (); mux dbl dots () and frequency multiplexing, for the readout of spin qubitsfreqMUX (), has been demonstrated as a potential up-scaling route. The significant challenges presented by the need to up-scale however are far from surmounted.
The measurement of many individually addressable quantum devices has led to initial studies on yieldhaider1 (), reproducibilityhaider2repro () and statistical analysis of complex quantum phenomenaLukePRB (). The split gatesgpaperfirst (); sgpaperquant1 (); sgpaperquant2 () can be considered as the building block for more complex gate-defined devices, such as quantum dotscgs (). Tuneable quantum dots require stable charge on several surface gates simultaneously in order to function. The multiplexing architecture presented in haider1 () doesn’t allow the simultaneous use of multiple gates. We therefore present two innovations that facilitate the fabrication and measurement of large interacting quantum device arrays.
We firstly show how a split gate can be used within a multiplexer-type addressing system, to enable the multiplexer to divide three or more ways at each node rather than two. Figure 1 shows a schematic of a single node of a 3-way multiplexer. A semiconducting two dimensional electron gas (2DEG), shown in blue, divides into three channels. Addressing-gates, G1 and G2, shown in red, pass over the left and right channels, either directly over the substrate surface, or separated by a dielectric, shown in green. Both G1 and G2 form split gates above the central channel. We define two voltages, the split gate pinch off V and the surface gate pinch off V. The width of the split gate and the thickness of the dielectric are chosen such that applying V to the addressing gates has only a small effect on the conductance of the 2DEG under the split gate and applying either V or V has a negligible effect on the conductance of the 2DEG below the dielectric. The voltage combinations required to address each channel are given in the dashed boxes below the relevant output. Applying V to G2 closes the right and central channels. Applying V simultaneously to G1 and G2 closes the left and right channels. Applying V to G1 closes the left and central channels. Such a multiplexer therefore provides 3 outputs from a single input using contacts.
The principle described above can be extended to construct multiplexers with four or more branches by incorporating further split gates. In figure 2 we show a multiplexer with 4-fold branching. Here, two split gate widths are used, giving two distinct pinch off voltages . The gate voltage combinations, applied to the addressing gates G1 and G2, required to address any given output are shown in the dashed boxes below the relevant output. More branching is possible as long as split gates can be fabricated with pinch off voltages that are sufficiently different from each other.
We next describe a device geometry that utilises a multiplexer to lock charge onto surface-gate electrodes. A diagram of the device is shown in figure 3. The example shown here uses our 3-way multiplexer. The device consists of three separate 2DEGs which we denote as (1) the multiplexer 2DEG, (2) the gate-source 2DEG and (3) the measurement 2DEG. The multiplexer outputs connect to surface gate electrodes, (a) in the figure, referred to as locking-gates. The gate-source 2DEG consists of a comb-like structure with a main channel and multiple tributaries. The main channel is covered by a dielectric, the structure of the gate-source 2DEG under the dielectric is picked out by the blue dotted lines. Each tributary is connected to a surface electrode referred to as a device-gate, these pass onto the surface of the measurement 2DEG to define the system to be measured. Each locking-gate passes over the dielectric and covers a single tributary of the gate-source 2DEG. The stages of operation of the device are shown in figure 4. Firstly, figure 4 (a), the multiplexer 2DEG and addressing gates are set to a voltage which we name the locking voltage , that is well beyond the depletion voltage of the 2DEG V (active gates are coloured maroon). This initial operation depletes the 2DEG under the locking-gates (depletion is represented by white blurring in the figure) thus isolating all the gate-source tributaries from the main channel. Next, figure 4 (b), the addressing gates are set to a voltage, which we name the double lock voltage , which is well beyond the split gate pinch-off voltage, V. This second operation isolates the locking-gates which are now charged and floating at . We next address one of the multiplexer outputs, e.g. the left branch in figure 4 (c), and set the multiplexer 2DEG to 0V. The addressed locking-gate discharges and the tributary is thus re-connected to the main channel of the gate-source 2DEG. This allows a single device-gate to be swept to the desired voltage. Next, figure 4 (d), the locking-gate is set to via the multiplexer input to isolate and lock the charge onto the device-gate, and the addressing gates are set to to isolate the locking-gates. The operations in figure 4 (b)-(c) can then be repeated for the other device-gates. In this way large numbers of gates can be set up to form complex devices.
We next present measurements of a device fabricated on modulation doped GaAs/AlGaAs high electron mobility transistor substrate with a 2DEG 90nm below the surface. The device consists of two opposing charge-locking systems built around standard 2-way multiplexers each terminating in 16 outputs. We use a 600nm layer of polyimide as the dielectric. Optical and SEM images of the device are shown in figure 5 (a) and (b) respectively. Fifteen device gates are used from each side. These meet on the measurement 2DEG separated by a central gate. The central gate (split into two, separately contactable sections to give greater control) forms two measurement channels each with a source and drain contact. The device-gates are arranged so that they can form two parallel rows of seven QDs. The first three of the four addressing levels are shared to save contact numbers. Minimum separation between the gate electrodes is 20 nm and the lithographically designed diameter of the dots is 300 nm. The device requires 20 contacts to enable full control. We first look at the stability of single floating gates. All the following measurements are carried out at 50 mK, the base temperature of our dilution refrigerator. The central gate is fixed at -0.5 V (2DEG depletion voltage -0.3 V) and a single gate is addressed as in figure 4 (c). The conductance as a function of device-gate voltage is then measured. Figure 6 (a) shows a representative plot of G as a function of V for the gate highlighted in blue in (b). The gate is then isolated, as in figure 4 (d), and the conductance monitored as a function of time. Figure 6 (c) shows such a plot. By comparing the two plots, i.e. figure 6 (a) and (c), the time varying conductance due to e.g. leakage from the charged, isolated device-gate can be converted in to an effective change in device-gate voltage. Figure 6 (d) shows a histogram of the effective drift of several gates. The modal average is around 7 mV/hr. We next show proof-of-principle by forming a QD between the central gate, a floating device-gate and an addressed device-gate. A circuit diagram of such a measurement is shown in figure 7 (a). The central gate is held at -0.5 V and device-gate 1 is set to -0.4 V and isolated. Device gate-2 is then addressed and the voltage swept. Figure 7 (b) shows the Coulomb blockade resonances appearing as device-gate 2 is swept. This measurement is repeated five times with one hour intervals between each sweep. A grey-scale plot of this is shown in figure 7 (c). The drift due to the floating gate is 8 mV, about one Coulomb period per hour for this dot.
The device and measurement circuit shown in figure 5 (b) allows in principle the formation of multiple QDS on one side of the central gate whilst single gates on the parallel channel may be activated to form a quantum point contacts for non-invasive sensing measurementsqpc (). We envisage using such an arrangement for the study of phenomenon such as spin waves and miniband formation.
Investigation into the causes of gate instability is required, further improvements may be achievable with the use of top gates. However, the techniques and device designs presented here represent a potentially powerful tool for the up-scaling of quantum devices and for the investigation of the basic physics associated with large numbers of coupled devices.
This work was supported by the Engineering and Physical Sciences Research Council Grant No. EP/K004077/1. The authors would like to thank R. D. Hall for electron-beam exposure.
- (1) Olga L. Lazarenkova, and Alexander A. Balandin, J. Appl. Phys. 89, 5509 (2001)
- (2) R. Hanson, L. P. Kouwenhoven, J. R. Petta, S. Tarucha, and L. M. K. Vandersypen, Rev. Mod. Phys. 79, 1217 (2007).
- (3) D. Loss and D.P. DiVincenzo, Phys. Rev. A 57, 120-126 (1998).
- (4) H. Al-Taie, L. W. Smith, B. Xu, P. See, J. P. Griffiths, H. E. Beere, G. A. C. Jones, D. A. Ritchie, M. J. Kelly, and C. G. Smith, Appl. Phys. Lett. 102, 243202 (2013).
- (5) D. R. Ward, D. E. Savage, M. G. Lagally, S. N. Coppersmith, and M. A. Eriksson, Appl. Phys. Lett. 102, 213107 (2013)
- (6) J. M. Hornibrook, J. I. Colless, A. C. Mahoney, X. G. Croot, S. Blanvillain, H. Lu, A. C. Gossard, and D. J. Reilly, Appl. Phys. Lett 104, 103108 (2014)
- (7) H. Al-Taie, L. W. Smith, B. Xu, P. See, J. P. Grifths, H. E. Beere, G. A. C. Jones, D. A. Ritchie, M. J. Kelly, and C. G. Smith, arXiv:1407.5806
- (8) L. W. Smith, H. Al-Taie, F. Sfigakis, P. See, A. A. J. Lesage, B. Xu, J. P. Griffiths, H. E. Beere, G. A. C. Jones, D. A. Ritchie, M. J. Kelly, and C. G. Smith, Phys. Rev. B 90, 045426 (2014).
- (9) T. J. Thornton, M. Pepper, H. Ahmed, D. Andrews, and G. J. Davies, Phys. Rev. Lett. 56, 1198 (1986).
- (10) B. J. van Wees, H. van Houten, C. W. J. Beenakker, J. G. Williamson, L. P. Kouwenhoven, D. van der Marel, and C. T. Foxon, Phys. Rev. Lett. 60, 848 (1988).
- (11) D. A. Wharam, T. J. Thornton, R. Newbury, M. Pepper, J. Ahmed, J. E. F. Frost, D. G. Hasko, D. A. Ritchie, and G. A. C. Jones, J. Phys. C 21, L209 (1988).
- (12) C G Smith. Rep. Prog. in Phys. 59 235 (1996).
- (13) J. M. Elzerman, R. Hanson, J. S. Greidanus, L. H. Willems van Beveren, S. De Franceschi, L. M. K. Vandersypen, S. Tarucha, and L. P. Kouwenhoven Phys. Rev. B 67, 161308 (2003).