Insights into classical irreversible computation using quantum information concepts

Insights into classical irreversible computation using quantum information concepts

Berry Groisman Centre for Quantum Computation, DAMTP, Centre for Mathematical Sciences, University of Cambridge, Wilberforce Road, Cambridge CB3 0WA, United Kingdom.

The method of using concepts and insight from quantum information theory in order to solve problems in reversible classical computing (introduced in Ref. bound_Toffoli ()) have been generalized to irreversible classical computing. The method have been successfully tested on two computational tasks. Several basic logic gates have been analyzed and the nonlocal content of the associate quantum transformations have been calculated. The results provide us with new interesting insight into the notion of complexity of logic operations.

I Introduction

The field of quantum information theory was born from a symbiosis of classical information theory and quantum mechanics. The main driving force behind the development of the new field is a vision of new computation and communication protocols and devices that would outperform their classical counterparts. At the same time, one might expect certain benefits to the classical theory as a “side effect” of this development. Such a feedback might be in interesting manifestation of the dynamical coexistence of the two fields from both theoretical and practical perspectives.

The first steps in this direction were made in Ref. bound_Toffoli (), where a method of evaluating (the bounds on) the number of Toffoli gates in a classical reversible circuit using quantum information concepts was proposed.

Here we generalize this approach to irreversible classical circuits, which provides an interesting insights into the nature of classical computing.

The structure of the article is as follows. Section II gives a brief overview of the method in bound_Toffoli (). Section III presents the details of how the method is generalized to irreversible case. In Section II we give two examples of its implementation.

Ii The Method

Let us recall the basic principles of the approach in bound_Toffoli (). The key idea is to map classical bits onto special orthogonal quantum states, i.e. and , thereby mapping strings of bits on the associate products of quantum states


such as


Subsequently, the action of the logic gates is mapped onto corresponding transformations acting on these states. For reversible circuits the corresponding associate quantum transformations are unitary. Then, the study of the properties of the quantum transformation that is associated to the classical computation can provide information about the classical circuit. The property of a quantum transformation was chosen to be its nonlocal content as expressed via two quantities: first, its entangling capacity , second its entanglement cost, (which always satisfy ) footnote_1 (). The number of elementary gates needed to implement a particular classical computation is bounded from below by the following ratio for the associate quantum transformations


To realize this programme the two states and have to be nonlocal (entangled) states. In particular, the following states were used in bound_Toffoli ()

Thus, classical logic bits are encoded in orthogonal maximally entangled states of two qubits.

Iii Generalization to irreversible

Here we generalize this approach to classical irreversible circuits. In this case the associate quantum transformations become non-unitary. In addition to entangling capacity and entanglement cost we will associate a third quantity - disentangling capacity, - with a non-unitary operation. For in the case of reversible computing was not very important since it does not affect the bound in Eq. (3). For irreversible computing the interplay between , and become much more interesting.

iii.1 1-bit logic gates: RESET

Let us start with a trivial example of the simple logic operation RESET (to zero) with corresponding truth-table

which is mapped on the non-unitary transformation

The operation is a superoperator or CPTP map, and is able to create 1 ebit of entanglement, which becomes evident if we consider unentangled input state . On the other hand 1 ebit is also sufficient to implement . This task can be accomplished, for example, if one simply replaces the original pair by an ancillary pair in a state and discards the original pair. More formally, this procedure can be presented as a SWAP operation on the original pair and an ancillary pair in the state followed by discarding the ancillary pair. Thus, . It is obvious that cannot destroy any entanglement since it always has a maximally entangled state as its output, i.e. .

Corollary, for a quantum counterpart of any deterministic (surjective) logic operation, with equal numbers of inputs and outputs.

iii.2 2-bit logic gates: XOR

Let us analyze a more complex, two-bit, XOR gate

It is mapped on the non-unitary transformation

Note, that unlike 1-bit transformations, is not trace preserving, because it is accompanied by loss of subsystems. We can account for this loss by introducing a purification. For example, can be obtained if one implements (unitary) CNOT

and discards the first pair. Nonlocal CNOT transformation is equivalent to two local CNOT transformations on corresponding qubits and therefore has zero entanglement cost bound_Toffoli (). Therefore, . However, since the first pair is discarder it effectively involves “dissipation” of entanglement. In other words, whatever the mechanism inside the box is it will “dissipate” entanglement of the first pair. Therefore, , .

iii.3 Universal 2-bit gates: NAND and NOR

Conceptually, the most interesting are NAND and NOR gates, because each of them is a universal gate for irreversible computation. Let us consider now the NAND gate

It is mapped on the non-unitary transformation


A purification of may arise if the two original pairs interact with a third, ancillary, pair in a standard state via unitary transformation


and consequently the ancilla and the second pair are discarded (traced out). In other words, it is a trace out of a Toffoli gate with one standard input. It should be noted that the realization (purification) in Eq. (III.3) is not unique. In fact, specification of the mapping of basis states in Eq. (III.3) does not fully determine , that is to say that Eq. (III.3) does not prescribe how an arbitrary linear combination of basis states will evolve. (This is the nature of a trace-non-preserving operations - they do not supply full information about the evolution of the system.) We will come back to this problem later.

Now let us calculate (bounds on) and . It is a difficult task to calculate the explicit value of for a quantum operation. At the time this paper was written the only known method of calculating it was a direct numerical optimization over all states accessible to the operation (even including ancillas). The value of can be obtained by providing an explicit way of implementation, though its optimality has to be also proven. However, it is much easier to find bound on these quantities - a lower bound on and an upper bound on . If the two bounds happen to coincide then one is lucky to obtain exact values of and . As we will see below, our calculations leave the gap between the two bounds in the case of NAND. Nevertheless, it will suffice to bound the number of gates as in Eq. (3).

To obtain a lower bound on we choose a special input state, the test state and obtain the corresponding output state


The difference between the amounts of entanglement possessed by and bounds from below the entangling capacity of . Any test state that leads to an increase of entanglement gives a lower bound. The higher the bound the better. The higher bounds can be obtained either by direct numerical search of by trial and error.

Consider, for example, the following disentangled state as an input,


Of course, the input state for a gate inside an irreversible circuit will be most likely a mixed state. The choice of the state in Eq. (8) was not motivated by this kind of considerations. We are interested in lower bounds on the entangling capacity, attainable in principle. How do we determine ? We have already mentioned that Eq. (III.3) does not specify completely. For example, if we extend to unitary as in Eq. (III.3) then the corresponding output state will be


However, the following unitary


will do the job as well, in which case


Thus, represents the whole family of quantum maps. The most general unitary extension will give

where , , and are complex amplitudes. The output state, therefore, will be


It is straightforward to calculate the relative entropy of entanglement of VP:ent_m_pp, which is


It can be shown that the minimum is achieved at , i.e. and equal . Recall that ebits and we obtain . On the other hand, it is clear that

To provide an upper bound on let us consider the following protocol. In addition to the first two pairs and we use an ancillary pair in a standard state and apply on these three pairs a nonlocal Toffoli gate as in bound_Toffoli (). This utilizes 2 ebits. Then we discard first two pairs and are left with one pair in the desired final state. The total cost of this procedure is 3 ebits. Therefore, .

Thus, we obtain


Interestingly, the NOR gate, an alternative universal gate for irreversible computing, has the same values of , , and .

iii.4 Calculating bounds

Now, if we are given a classical circuit all we have to do is to calculate (a lower bound on) of the associate quantum transformation and obtain the bound on using Eq. (3). As NAND (or NOR) is a universal gate any circuit can be build from NAND gates alone. The present method is unable to provide a bound in this case. This is because some of the NAND gates in a circuit will replace other gates that have , and thus even if the whole quantum transformation has we will need nonzero number of NAND gates. On the other hand, we might consider universal sets of two or more gates, e.g. NAND and XOR. The bound (3) provides us with a meaningful result when one tries to minimize the usage of NAND gates by supplementing them by other gates, e.g. XOR gates.

Entanglement cost of the gates in a sense gives us an insight into the computation complexity of the gates. The fact that while emphasized an essential difference between XOR and NAND gates - XOR gates involve less computational effort than NAND gates so to speak.

Iv Example of irreversible computation

iv.1 Example I: Parity calculation

Consider a trivial example of the circuit that calculates a parity function, i.e. for a binary string of bits it calculates whether the number of zeros is even or odd. Obviously, half of all possible input strings will have even number of zeros and half will have odd number of zeroes. Therefore, if we use a uniform superposition of corresponding quantum sequences as an input, then the output will be which has zero entanglement. In fact, numerical calculation indicate that any input states will lead to no increase of entanglement, i.e. . Thus, application of our method, i.e. Eq. (3), yields . Indeed, the whole computation can be easily accomplished by sequential application of XOR gates, and therefore no NAND gates are needed to implement the computation 111The simplest circuit can be build as a cascade of XOR gates. For odd one ancillary input with constant value should be added.. As we have shown XOR gates have zero entanglement cost and therefore their combination cannot increase overall entanglement.

iv.2 Example II: First step in Shannon compression

As a more complex example let us consider the first step in Shannon compression - the majority measurement. For bit input string the circuit calculates the number of 1’s, 222For this computation is the well known Full Adder.. There are possible values of , therefore we have bit output string


Without loss of generality let us assume that the output strings represent the values of of corresponding input string in a binary form, e.g.



As before we take the initial state to be a uniform superposition of all basis states


Figure 1: The lower bound on the gain of entanglement, as expressed by , for several values of n, approximated by (red dashed line) and (blue dotted line).

The corresponding output state is


where is a binary to decimal converter, that assigns a corresponding value of to every sequence (term) in the sum in Eq. (19). As there are pairs of qubits involved in the output state it might give us a clue that the output entanglement scales not faster than . This intuition is supported by the results showed in Fig. 1. Therefore, the lower bound on the number of NAND gates required to implement the computation grows as . Thus, our results clearly indicate, that for at least one NAND gate is required. Interestingly, this conclusion is corroborated by known circuits implementing the Full Adder (), which is constructed out of two NAND gates, three XOR gates and two NOT gates.

V Discussion

This work demonstrates that the method of Ref. bound_Toffoli () can be successfully to irreversible classical computing. Following that method we have constructed quantum counterparts of several logic gates, namely RESET, XOR, NAND and NOR, and have calculated nonlocal content of these quantum transformations. Three quantities were associated with the entanglement content - entangling capacity, , disentangling capacity, and entanglement cost, . Together with the number of logic bits these quantities provide a non-trivial characterization of gates. We have seen that deterministic, but irreversible, one-to-one-bit gate, RESET, has and . An irreversible two-to-one-bit gate, XOR, exhibits completely different properties, namely and . The third type - two-to-two irreversible universal gates, NAND and NOR, have and . The entanglement cost, , was an essential ingredient for estimating lower bounds on the number of universal gates. Every circuit can be built from the universal gates alone. However, since NOT and XOR gates have , our method can only provide bounds on the minimal number of universal gates when the numbers of NOT and XOR gates are not limited, i.e. when one aims to minimize the number of universal gates by using other gates, if possible. It is worth emphasizing that our method is not constructive in the sense that the bounds it provides do not tell us how a particular circuit can be built from a certain type of gates.

The method was tested on two computational task. As a first task we have chosen the calculation of the parity of a binary string of bits. Our method indicates that no NAND or NOR gates are needed to construct a circuit which realizes this calculation. This conclusion is consistent with the fact, that this computation can be achieved by simple cascade of XOR gates. The second task is the first step in Shannon data compression, i.e. calculating the number of s in a binary -bit string. Our method provides the lower bound on of a fraction of . It is worth noting that our method can provide minimal bounds of at most , because the corresponding output quantum state can posses at most ebits of entanglement.

Our results provide an interesting insight into complexity of computation. The link between our approach and computation complexity was already established in bound_Toffoli (). Indeed, in the reversible scenario it was shown that of the quantum counterpart of Toffoli gate (a universal gate) is non-zero whereas two-bit gates, e.g. CNOT, and one-bit gates, NOT, do not consume any entanglement at all. Therefore, one can use as a kind of measure of the complexity of the associate classical logic gate itself. However, in the reversible case the distinction between Toffoli and two- or one-bit gates in term of their complexity is intuitively straightforward - Toffoli is more complex because it performs a nontrivial computation on more bits. In the case of irreversible computation this distinction becomes much more subtle. This is why the results of this work provide us with much more interesting and powerful insight. Indeed, here universal gates are not distinguishable from other two-to-one-bit gates simply by the number of inputs/outputs. than NAND and NOR are in certain sense computationally (logically) stronger, than XOR. One-to-one-bit RESET gate stands alone for having a nonzero . However, we note that RESET gate does not actually perform a computational task.

This work was funded by the U.K. Engineering and Physical Sciences Research Council, Grant No. EP/C528042/1.


  • (1) S. Popescu, B. Groisman, and S. Massar, Phys. Rev. Lett. 95, 120503 (2005).
  • (2) In Ref. bound_Toffoli () these two quantities were identified as nonlocality of production and nonlocality of implementation respectively.
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