# Error-transparent quantum gates for small logical qubit architectures

###### Abstract

One of the largest obstacles to building a quantum computer is gate error, where the physical evolution of the state of a qubit or group of qubits during a gate operation does not match the intended unitary transformation. Gate error stems from a combination of control errors and random single qubit errors from interaction with the environment. While great strides have been made in mitigating control errors, intrinsic qubit error remains a serious problem that sets the primary limit for gate fidelity in modern superconducting qubit architectures. Simultaneously, recent developments of small error-corrected logical qubit devices promise significant increases in logical state lifetime, but translating those improvements into increases in gate fidelity is a complex challenge. In this Letter, we propose a new formalism for implementing gates on and between small logical qubit devices which inherit the parent device’s tolerance to single qubit errors which occur at any time before or during the gate. Using a standard phenomenological noise model for superconducting qubits, we demonstrate a universal one- and two-qubit gate set with error rates an order of magnitude lower than those for equivalent operations on single qubits or pairs of qubits, running for the same total duration. The effective logical gate error rate in these models displays superlinear error reduction with linear increases in single qubit lifetime, proving that passive error correction is capable of increasing gate fidelity. These developments further suggest that incorporating small logical qubits into a measurement based code could substantially improve code performance.

To build a fault-tolerant, error-corrected quantum computer, every operation in the code (one- and two-qubit gates, state preparation, measurement and idling) must be performed to extremely high fidelity Fowler et al. (2012); Terhal (2015). While the requisite fidelities have been achieved in single qubit gates Chow et al. (2012); Barends et al. (2014), improving two-qubit gate performance is considerably more difficult Kelly et al. (2014); McKay et al. (2016); Paik et al. (2016); Blumoff et al. (2016), with experimentally realized gate error not far below the threshold rate. Further, the classical processing required for a code involving tens or hundreds of millions of physical qubits is daunting, and increasing the cycle time to reduce this burden increases error rates, further degrading code performance. An improved qubit primitive capable of much higher two-qubit gate fidelity and state lifetimes could thus make it dramatically easier to implement a topological code.

We propose to address both challenges by extending our recent proposal for a small, passively error corrected quantum device Kapit (2016), called the “Very Small Logical Qubit.” Small logical qubit circuits have attracted much interest in recent years Mirrahimi et al. (2014); Sun et al. (2014); Leghtas et al. (2015); Cohen and Mirrahimi (2014), including the first experimental demonstration of a quantum error correction protocol that exceeds breakeven Ofek et al. (2016). However, due to the larger and more complex Hilbert space, error correction that increases idle lifetime does not necessarily improve gate fidelity. To achieve this, we propose a new formalism for engineering “error-transparent” quantum gates ^{1}^{1}1We refer to these gates as “error-transparent,” since they are resilient to single qubit error which occurs before or during their operation. Error transparency is distinct from the more general notion of fault tolerance, as fault tolerance is typically interpreted as the ability to exponentially reduce logical error rates from a polynomial increase in circuit complexity. The small logical qubit circuits considered here do not have an obvious scaling path, but perform extremely well against single error events, and could potentially improve code performance by replacing single qubits in a larger measurement-based code., where the physical Hamiltonian implementing the gate is carefully tailored such that it commutes with single-qubit errors (in this case, photon losses) when acting on the logical state manifold, at all times during the gate operation. This criteria ensures that subsequent error correction will recover the correct (transformed) logical state regardless of when the error occurred during the gate operation. The error rate of such a gate in the ideal limit would thus decrease as (where and are the gate, error correction and random error timescales, respectively), leading to large improvements in gate fidelity, as random single qubit errors are the current limiting factor in well-designed architectures Kelly et al. (2014). These developments are similar to recent work for cat codes, where robust gate Mirrahimi et al. (2014); Albert et al. (2016) and measurement Cohen et al. (2016) protocols have been proposed, though these schemes fall short of a complete universal gate set which is insensitive to single errors that occur at any random point during any gate. We will describe how to implement an error-transparent gate set for the VSLQ architecture, and benchmark its performance through numerical simulation. We will demonstrate super-linear decreases in gate error with increased and show that two-qubit gate error rates in the low range are achievable without further increases in base qubit coherence.

The Very Small Logical Qubit: We shall blueprint a realistic implementation of an error-transparent gate set in the VSLQ architecture Kapit (2016). A VSLQ consists of a pair of transmons coupled by a tunable, flux driven coupler Kapit (2015) driven at high frequencies to coherently drive two- and four-photon transitions. Defining and to be the projector onto states where object contains exactly photons, the rotating frame VSLQ Hamiltonian, in the three level basis ^{2}^{2}2The continuously increasing nonlinearity allows us to effectively ignore the and states of each transmon. Mixing with these states will create small higher order corrections, which can be easily compensated by additional signals to counter their effects. For clarity and simplicity we will ignore these effects here. of the left and right qubits and is given by:

(1) |

The ground states of the VSLQ are the two states satisfying . For the simulations in this paper, we used MHz and MHz (both ). Given the phenomenological noise model for superconducting qubits of low-frequency phase noise Martinis et al. (2003); Ithier et al. (2005); Yoshihara et al. (2006); Bylander et al. (2011); Anton et al. (2012); Yan et al. (2013); Paladino et al. (2014); O’Malley et al. (2015) and white noise photon loss, when coupled to additional lossy elements the VSLQ acts as a logical qubit protected against all single qubit error channels. Specifically, we introduce two additional lossy “shadow” qubits Kapit et al. (2014), with circuit Hamiltonian

(2) |

By careful tuning of and , a photon loss in a primary qubit can be converted to an excitation in a shadow qubit, returning the VSLQ to its original logical state. By then introducing a fast loss rate for the shadow qubits, the shadow qubit excitation can be eliminated, returning the system to its rotating frame ground state and completely eliminating the error. While phase errors cannot be corrected through this mechanism, the large term introduces an energy penalty for phase errors. Since phase noise is low-frequency dominated, it is thus strongly suppressed– see the Supplemental Material of this paper for quantitative simulations.

Pulsed error correction and idle error: In the original VSLQ work, the error correction was continuously applied with constant and shadow qubit loss rate . However, performance can be improved by running these error correction drives as discrete pulses (FIG. 1). In this scheme the shadow qubit lifetime is by default set equal to the primary qubits, but can be rapidly adjusted to a fast loss rate by adjusting its energy to be close to that of a fast readout resonator. The error correction cycle runs as follows: the shadow qubits are set to a low loss rate, the error correction drive is turned on for a full photon loss correction, then the shadow qubit is set to a very fast loss rate with in the tens of MHz (either though a controllable detuning or driven state transfer to a lossy resonator). This protocol does not dramatically decrease idle error compared to well-chosen continuous drive parameters, but it can have more pronounced effects on gate fidelity, allowing us to implement the timed XCX gate described below.

Error-transparent gates for a single VLSQ: To generate an error-transparent single qubit gate set for the VSLQ, we need to construct two operators and , which we can apply in combination to produce rotations between any two points on the device’s Bloch sphere. A natural pair of operators is given by:

(3) |

These operators commute with and anticommute with each other, and sequences of partial rotations constructed from them can implement arbitrary rotations in the logical manifold.

However, these operators are not error-tolerant, since the bare operators and return zero acting on a state, and their commutator with the single photon loss operator thus has matrix elements when acting on the logical state manifold. If a photon loss occurs during a gate, the desired operation will not be continuously applied to the VSLQ until the photon loss is repaired. Since the time between the initial loss and its correction is not measurable in the circuit, an unknown fraction of the gate operation is not applied, producing an unheralded quantum error. To construct error-transparent versions, modify our operators by defining:

(4) | |||

Both of these operations can be implemented by adding additional signals through the VSLQ’s central SQUID, and we shall see that they suffer no loss of fidelity from a single photon loss in either qubit.

We first consider , and imagine that a photon loss occurs in the qubit during the application of as a gate Hamiltonian. Since there are by default no states in the logical state manifold, the term returns zero, and trivially, so for in the logical state manifold . Similarly, if a photon is lost from the left qubit, the term returns zero, but since the logical states are defined by , and thus the system evolves identically under , and as well. Of course, if two or more photons are lost during the gate operation a logical error will occur, so the gate error should shrink as nearly as grows.

Let us now consider . Since our error model assumes photon losses but no photon addition, if one of the transmons is in a state it decayed from a state in the logical state manifold. As returns 1 on both and , evolution of a logical state under the operator is unchanged by a single photon loss in either qubit. is thus similarly protected against single photon losses as is. The performance of these gates against photon loss is shown in FIG. 2. To make the computation tractable, our simulations restricted the VSLQ transmons to the three-level basis and assumed perfect implementation of the error-tolerant operators. The only significant error source in our simulations was thus random photon loss, as control error is negligible for the long gate durations considered. Errors due to the effect of higher levels are very small and can be eliminated by numerical optimization schemes such as GRAPE Khaneja et al. (2005).

Two qubit gates: Opaque operations timed with error correction: Implementing a realistic two-VSLQ entangling gate based on the error tolerant operators (4) is a subtle challenge. The essential reason for this is that the error tolerant and are constructed from two-qubit operations, and products of them acting on two VSLQ copies involve three- and four-qubit operations that are difficult to implement. One could engineer these operations using a gadget construction as in Kapit et al. (2015), but doing so increases circuit complexity and the gadget degrees of freedom introduce additional error channels. We will thus avoid this route in this Letter.

Our first method for engineering error-transparent gates is to use the bare, “opaque” operators and (for VSLQ copies and ), but timing their operation to coincide with when error correction pulses minimize the instantaneous likelihood of finding a qubit in a state. We let our ideal entangling “XCX” gate be defined as:

(5) |

The single-qubit parts of (5) can be implemented with error-transparent operations, but the entangling two-qubit portion cannot without including four-body terms. So in our physical gate, we apply a pulse

(6) |

where the and terms are gate envelope functions as shown in FIG. 1. Note that even in absence of additional terms, these pulses may have an advantage over ordinary two-qubit gates between single transmons, since in those cases, a single photon loss which occurs at any time during the gate is a logical error that ruins the fidelity of the gate. In contrast, a photon loss which occurs during a operation prevents any further state evolution through the operator until the photon loss is corrected, but does not affect the other qubit in the VSLQ and thus does not prevent the parent state from being recovered. In other words, single photon losses cause the gate to be only partially applied, with a fidelity loss that depends on when the photon loss occurs during the gate process. From this we can draw two conclusions: first, that photon losses which occur toward the end of a gate (after most of the gate operation has already occurred) will do little to reduce the fidelity, and second, if error correction is applied during the gate operation it can halt further fidelity loss from a prior photon loss.

Our numerical simulations support this prediction. For Gaussian gate and EC pulses ^{3}^{3}3Due to the computational cost of simulating each gate operation, we did not attempt sophisticated optimization protocols such as GRAPE, and instead chose our gate waveforms based on heuristics and simulations of single-VSLQ gates. Undoubtedly, using such protocols could improve the performance of the gate beyond what we show here. the best timing we were able to achieve was to apply the pulses in approximately last third of each EC pulse, with the total gate operation spread out over multiple EC pulses. The results of our simulations are shown in FIG. 3, showing superlinear reductions in gate error with linear increases in , with a net error rate of for . Gate fidelity was found by evolving the system’s Lindblad equation Gardiner and Zoller (2004) until the decay rate equilibrates (eliminating spurious short-time behavior), performing the gate and averaging the resulting error rate over all thirty-six combinations of initial eigenstates the two VSLQ copies; for further details, see the Supplemental Material. We can compare these results to the error rate of ordinary two-qubit gates subject to single qubit photon losses. In these gates, in absence of control and leakage errors, increasing the gate duration always increases the error rate through proliferation of single qubit errors. In contrast, for the XCX operation between VSLQ copies, doubling the gate duration decreases the error rate once is sufficiently high, likely due to suppression of higher order processes (single-VSLQ logical error is a nearly negligible contribution here). The resulting gate error rate for 400 ns XCX with is about 85% of the error rate for an ordinary two-qubit gate of one tenth the duration. An elegant physical implementation of our two-qubit gate set could be based on tunable, flux-driven couplers such as those demonstrated in Chen et al. (2014); McKay et al. (2016); see the Supplemental Material for details.

Two-qubit gates: Error transparent phase gate: The XCX gate of the previous section is not truly error-transparent, since the gate ceases to operate between a photon loss and its correction. To generate an error-transparent gate for the VSLQ, we first note that, if both VSLQ copies are in the logical state manifold, the entangling operation (where the operators in XCX have been replaced with terms) can be generated as:

This coefficient is generated perturbatively, with a factor of 4 from combinatorics canceled by the energy cost of transiently flipping both VSLQ copies into states from a or term. Now imagine that a single photon is lost in one of the VSLQ copies. The action of the terms now only has an energy cost of , which suggests that if we define the Hamiltonian

will have the same perturbative coefficient (to second order in , at least) and return the same phase evolution even if a single photon is lost, as the coefficient is cut in half when acting on a state and a state is only present due to decay from states (hence the replacement of with ). The expression (Error-transparent quantum gates for small logical qubit architectures) is understood to only be correct if one or zero photons have been lost (from any of the four transmons); if two photons are lost the gate will not operate as intended, but at high this is rare and the gate error will decrease nearly quadratically in increasing .

We can benchmark the performance of these gates numerically. Using the profile shape in FIG. 1, we demonstrate super-linear scaling of gate error, with the errors rate for a CZZ gate split over two or four EC pulses (200 or 400 ns total gate time) are best fit by ( at ) and , respectively. The quadratic term thus dominates until is large. We attribute the linear term to higher order perturbative corrections; gate error in the absence of random error processes is of order . Gate waveforms for XCX/CZZ are simple Gaussian/Tanh pulses, and gate error could undoubtedly be further reduced in both cases through sophisticated numerical optimization.

State measurement and conclusions: To measure the state of a VSLQ, we adopt the protocol of Didier et al Didier et al. (2015), and implement a coupling between each qubit and a common readout resonator, of the form

(9) |

To measure the state, we ramp from zero to a finite value and then measure the resulting resonator signal. In absence of photon losses, this tracks the eigenvalue, and the phase of the resonator will evolve toward the target value. If a single photon is lost, one of the operators will return zero, but the other will continue to operate normally, and the pointer state will evolve in the appropriate direction (though at half the rate). One can thus accurately capture the eigenvalue of the parent logical state by simply measuring for a long enough time to achieve the appropriate contrast even with the drive strength cut in half. Ignoring higher order corrections (that can in general be suppressed through pulse shaping or by adding further signals) we thus expect measurement error to scale as , where is the characteristic measurement time that depends on the resonator damping rate and other experimental considerations. One can achieve similar scaling by measuring and independently, or by mapping the eigenvalues to the state of two ordinary transmons, which are then measured by dispersive shift.

We have presented a universal, error corrected quantum gate set for the VSLQ architecture, in which gate operations inherit much of the parent device’s tolerance to single-qubit errors. The simulated performance of these gates is extremely promising, with two-qubit gate error rates in the low range achievable without further increasing beyond what has already been achieved in contemporary experiments. Combined with robust measurement protocols, we have outlined the essential ingredients required for a “dissipative subsystem code,” where VSLQ copies replace single qubits in a topological code, improving the fidelity of each code operation by an order of magnitude. However, it is important to caution that leakage (short-lived populations of or states) must be rigorously analyzed before making quantitative predictions about code performance.

## I Acknowledgements

We would like to thank Jonathan DuBois, Eric Holland, David Rodriguez-Perez, Yaniv Rosen and David Schuster for useful discussions. This work was supported by Lawrence Livermore National Laboratory and by the Louisiana Board of Regents RCS grant (LEQSF(2016-19)-RD-A-19.

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## Appendix A Supplemental Material

Benchmarking gates: To benchmark our gates, we adopted the following protocol. For a given , gate waveform and error correction protocol we generated an initial density matrix by initializing each copy in the ground state and evolving it under error correction until the decay rate equilibrates (eliminating short-time behavior related to residual shadow qubit populations and the choice of operator being measured). Empirically this occurs in fewer than ten error correction cycles, so we ran ten simulated error correction cycles to prepare initial density matrices. We store the resulting density matrix , and then use idealized error-tolerant rotations to prepare each copy in one of the six canonical directions on the Bloch sphere. We then measure the initial fidelity using projection operators (where is one of the error-transparent , or ), evolve the system for one full gate operation, apply the ideal transformation (5) (or its ZZ equivalent) to invert the physical gate, and then measure the projection operators again. The difference in fidelities, averaged over all 36 initial directions, yields the average error per two-qubit gate. We chose this approach over simulating randomized benchmarking because of the large computational cost of numerically integrating the Lindblad equation, given that the Hilbert space of two VSLQ copies and their attendant shadow qubits contains elements; this method requires significantly fewer Lindblad evolutions.

Phase noise: We quantify the resilience of the VSLQ to phase noise in FIG. 4. As predicted in the original work, the combination of a strong driving term (the 25 MHz coupling) and rapid error correction suppress the effect of phase noise, so that even relatively strong phase noise does not prevent dramatic increases in state lifetime. To compute these values, we initialized a single VSLQ copy in an a eigenstate, and allowed it to evolve under photon losses, continuous passive error correction and phase noise acting on each of the two primary qubits, with averaged over 400 random noise traces before fitting to extract a lifetime. We can see from these results that even a modest of a few s still allows for order of magnitude increases in state lifetime, and since single VSLQ logical errors are a small contribution to the total two-qubit gate error rate, we expect that the high two-qubit gate fidelities derived elsewhere in this work will be only modestly affected by phase noise. This is reassuring, since we expect that the flux loop couplers integral to the VSLQ’s design will be an additional source of flux noise, so the bare qubit and (in absence of drives and dissipation) may be somewhat lower than single qubits fabricated using the same process and subjected to the same environment.

Implementing operations:

To implement we apply two tones, one through the central coupler of the VSLQ and another which is applied directly to the charge or flux degree of freedom of the right transmon. We assume the central coupler has a bias of so that all the terms which generate show up at first or third order (if the central coupler has a 0 or bias the signal structure will change but the result will be the same). We add to the Hamiltonian a term of the form:

(10) |

Optionally, the term can be implemented through coupling to instead of . The single photon transition induced by this drive is off-resonant, but the two-photon transition produced by squaring this operator is not, so we can treat it perturbatively. The result, taking into account mixing with higher levels, takes the form:

(11) |

Here, , and are dimensionless prefactors that need to be computed in perturbation theory. For realistic parameters so we can effectively ignore (or cancel it through the method described below). If we then write as a diagonal matrix by carefully choosing the ratio of to we can obtain . By combining this with an ordinary term generated through other means (such as additional single-photon drives) we can arrive at as desired.

Implementing , and XCX:

One way to implement the coupling is through a tunable mutual inductor, as in Chen et al. (2014), though formally any rapidly tunable coupling element could likely be adapted for our purposes. This coupling takes the form:

(12) |

Assuming the plasma frequency of the coupler junction is suitably large, these couplers can be driven at high frequencies. Further, because there is no physical current flow across the mutual inductance, no unwanted terms arise from flux quantization requirements around large loops. Such a design is thus scalable for a large system.

To achieve the (Error-transparent quantum gates for small logical qubit architectures) Hamiltonian required for CZZ, we drive the coupler via:

(13) |

Here, is a detuning such that the drive signal is relatively far off-resonance from any two-qubit transitions. While driving the circuit in this manner does not change photon number in either qubit, off-resonant mixing with other levels creates a set of energy shifts in second order perturbation theory:

(14) |

With a bit of algebra, we can rearrange the terms in as

Of these terms, the coefficient is the target in (Error-transparent quantum gates for small logical qubit architectures), is a constant which does not change the system’s dynamics, is an irrelevant energy shift for states that can be compensated by adjusting the frequency of error correction drives, is a single qubit energy shift between levels 0 and 2 that can be cancelled through other means, and is an irrelevant interaction term that only influences the system when both VSLQ copies have lost a photon, causing a gate error. Given a desired and focusing on , , , and , if we equate those terms in (14) with their equivalents in (A), we have a simple system of five equations with five unknowns (, , , , ) that we can readily solve to find and . While the particular values solving these equations depend on the fixed device parameters and for each of the four qubits, for physically realistic and GHz, we obtain MHz from MHz (this is reduced to about 12 MHz when matrix elements from are included) and MHz. Such values are all experimentally accessible; a coefficient of this strength is sufficient for the 400 ns gate in the text.

Note that this treatment is somewhat abbreviated for simplicity and clarity, and a more sophisticated analysis would take the terms into account (off resonant driving is assumed to transiently take a state out of the manifold but not back into it if acting on a state) in generating the coefficients. Though we do not include it here, we have worked through such a treatment for realistic device parameters and shown that it modifies the target coefficients only slightly and does not introduce new terms which cannot be cancelled by simple single-qubit operations. We also note that the operation required for single qubit gates can be engineered through exactly the same protocol (with the drive signal applied through the central SQUID coupler in that case), and such couplers could also be operated in different frequency regimes to enact XCX.