Computing in continuous space with self-assembling polygonal tiles (extended abstract)

Computing in continuous space with self-assembling polygonal tiles (extended abstract)

Oscar Gilbert Department of Mathematical Sciences, University of Arkansas, Fayetteville, AR, USA. oogilber@email.uark.edu. This author’s research was supported in part by National Science Foundation Grants CCF-1117672 and CCF-1422152.    Jacob Hendricks Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, AR, USA. jhendric@uark.edu. This author’s research was supported in part by National Science Foundation Grants CCF-1117672 and CCF-1422152.    Matthew J. Patitz Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, AR, USA. mpatitz@self-assembly.net. This author’s research was supported in part by National Science Foundation Grants CCF-1117672 and CCF-1422152.    Trent A. Rogers Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, AR, USA. tar003@uark.edu. This author’s research was supported by the National Science Foundation Graduate Research Fellowship Program under Grant No. DGE-1450079, and National Science Foundation grants CCF-1117672 and CCF-1422152.
Abstract

In this paper we investigate the computational power of the polygonal tile assembly model (polygonal TAM) at temperature , i.e. in non-cooperative systems. The polygonal TAM is an extension of Winfree’s abstract tile assembly model (aTAM) which not only allows for square tiles (as in the aTAM) but also allows for tile shapes which are arbitrary polygons. Although a number of self-assembly results have shown computational universality at temperature , these are the first results to do so by fundamentally relying on tile placements in continuous, rather than discrete, space. With the square tiles of the aTAM, it is conjectured that the class of temperature systems is not computationally universal. Here we show that for each , the class of systems whose tiles are the shape of the regular polygon with sides is computationally universal. On the other hand, we show that the class of systems whose tiles consist of a regular polygon with sides cannot compute using any known techniques. In addition, we show a number of classes of systems whose tiles consist of a non-regular polygon with sides are computationally universal.

1 Introduction

Self-assembly is a process by which systems that evolve based only on simple local interactions form. Studying self-assembling systems can lead to insights into everything from the origin of life [25] to new and novel ways to guide atomically precise manufacturing. Theoretical modeling of self-assembling systems has uncovered important mathematical properties [23, 1, 2, 7, 8, 3, 14], and physical realizations have been experimentally verified in the laboratory and used to create intricate nanostructures [22, 24, 17, 4, 15, 10]. In order to facilitate the design of these systems, a number of mathematical models have been introduced. The work presented in this paper examines a model of self-assembly which is an extension of Erik Winfree’s abstract Tile Assembly Model (aTAM) [27]. In the aTAM, the fundamental components are square “tiles” with “glues” on their edges. These tiles can then combine depending on their glues to form surprisingly complex and mathematically interesting structures [26, 23, 16, 7, 21].

A long standing open conjecture in regards to the aTAM is that systems in which tile attachments depend only on one exposed glue (we call such systems temperature-1 systems) are not computationally universal [9, 19, 18]. It may appear clear that this conjecture is certainly true, but the ability of tile assembly systems to place a tile which prevents the attachment of a later tile gives these systems a surprising amount of power [12, 11, 13, 6] and has made proving such a result elusive. In fact, the exploitation of this ability has been used to show that temperature- systems in other models are computationally universal [20, 5, 12, 13, 11].

This paper examines the computational power of a model which is similar to the aTAM with the exception that the shape of the tiles in the systems is relaxed to include any shape which is a polygon. Unlike all previous work, our model makes no assumption about an underlying lattice and discrete space. Instead, we must work in the real plane, and fundamentally exploit continuous space to precisely position polygonal tiles. We call this model the polygonal TAM and show that certain classes of temperature- systems in the polygonal TAM are computationally universal. In order to show our results about computational universality, we explicitly construct “lattices” for polygons and create geometric “bit-readers”. In the case of regular polygons with sides, we exploit the inability of these polygons to tile the plane to read bits. In fact, we show that for regular polygons which do tile the plane, bit-reading gadgets are impossible to construct. Interestingly, our exploits do not work for pentagons. In particular, we show that even though pentagons cannot tile the plane, bit-reading gadgets are impossible to construct with them.

The layout of the paper is as follows. We first introduce the polygonal TAM. Next, we introduce our main results which concentrate on the computational power of polygonal TAM systems at temperature . Our first main result states that for any regular polygon with sides, there exists a polygonal TAM system consisting of tiles of shape which simulates any Turing machine on any input. We then provide evidence that this computational boundary is tight by showing that the class of polygonal TAM systems composed only of tiles of a single shape which is any regular polygon with sides cannot compute using any currently known techniques. On the other hand, we show that the class of polygonal TAM systems whose tiles are composed of any two regular polygons is capable of simulating any Turing machine on arbitrary input. We then show two positive results about computing with systems whose tiles have the shape of non-regular polygons with less than seven sides. In order to show these results we have two supporting sections. One shows how we can create a “lattice” in the plane out of any regular polygon. The other uses these “lattices” to connect together several components which “read bits”.

2 Preliminaries

In this section we sketch definitions of the Polygonal Tile Assembly Model (Polygonal TAM) and relevant terminology.111The Polygonal TAM is simply a case of the polygonal free-body TAM defined in [6] with no rotational restriction and no tile flipping. We define it here for completeness. Please see the Appendix for more detailed definitions.

Polygonal Tiles

A simple polygon is a plane geometric figure consisting of straight, non-intersecting line segments or “sides” that are joined pair-wise to form a closed path. As is commonly the case, we omit the qualifier “simple” and refer to simple polygons as polygons. A polygon encloses a region called its interior. The line segments that make-up a polygon meet only at their endpoints. Exactly two edges meet at each vertex. We define the set of edges of a polygon to be the line segments that make-up a polygon. In our definition we find it useful to give a polygon a default position and rotation. First, we assume that the centroid, say, of any polygon is at the origin in . Then, for a polygon with edges, let be some vertex of such that . By possibly rotating about , we can ensure that and . For a given polygon and some vertex of that is not equal to the centroid of , we call this position and rotation the standard position for given .

A polygonal tile is a polygon with a subset of its edges labeled from some glue alphabet , with each glue having an integer strength value. Two tiles are said to be adjacent if they are placed so that two edges, one on each tile, intersect completely. Two tiles are said to bind when they are placed so that they have non-overlapping interiors and have adjacent edges with complementary glues and matching lengths; each complementary glue pair binds with force equal to its strength value. An assembly is any connected set of polygons whose interiors do not overlap such that every tile is adjacent to some other tile. 222As with the aTAM, the edges of two tiles of an assembly may intersect, but we do not allow for the interiors of two tiles of an assembly to have non-empty intersection. Given a positive integer , an assembly is said to be -stable or (just stable if is clear from context), if any partition of the assembly into two non-empty groups (without cutting individual polygons) must separate bound glues whose strengths sum to . We say a tile is in standard position if the underlying polygon defining its shape is in standard position. We also refer to the centroid of a polygonal tile as the centroid of the underlying polygon defining the shape of the tile.

Tile System

A tile assembly system (TAS) is an ordered triple where is a set of polygonal tiles, and is a -stable assembly called the seed. is the temperature of the system, specifying the minimum binding strength necessary for a tile to attach to an assembly. Throughout this paper, the temperature of all systems is assumed to be , and we therefore frequently omit the temperature from the definition of a system (i.e. ). If the tiles in all have the same polygonal shape, is said to be a single-shape system; more generally is said to be a -shape system if there are distinct shapes in . If not stated otherwise, systems described in this paper should by default be assumed to be single-shape systems.

We define a configuration of to be a (possibly empty) arrangement of tiles in where tiles of this arrangement are translations and/or rotations of copies of tiles in . Formally, we define a configuration of as follows. For a -shaped system , let , , , denote the polygons that make up the shapes of . For each such that , assume that each is in standard position given some vertex of . Then, a configuration of is a partial function . One should think of this function as mapping centroid locations and an angle of rotation, say, to a tile in as follows. Starting from in standard position, is rotated counter-clockwise by and translated so that the centroid of is at . Note that the definition of configuration makes no claim as to whether or not two tiles of a configuration have overlapping interiors or have matching glues. Similarly, we can define an assembly to be a configuration such that every tile is adjacent to some other tile and the intersection of the interiors of any two distinct tiles is empty. Then an assembly is a subassembly of if and if then . We define subconfiguration analogously to the way we defined subassembly.

3 Geometric Bit-reading, Grids, and Turing Machine Simulation

In this section we state our main results and then give a high-level description of the machinery used to prove these results. In particular, we describe bit-reading gadget assemblies and grid assemblies, and briefly show how to simulate a Turing machine using these assemblies. The general strategy that motivates the work in this paper is similar to the the techniques used in [5, 13, 11]. Unlike the techniques used in [5, 13, 11], we do not have an underlying integer lattice that is being tiled, and therefore, must rely on analysis of polygonal tile assemblies in .

3.1 Main results

We now state our main results. The first set of results are positive and state that there are a variety of systems with polygons which can simulate any Turing machine. The last result is a negative result which states that the class of systems whose tiles are composed of regular polygons with less than sides cannot compute using known techniques in self-assembly.

Informally, our first theorem states that if is a regular polygon with sides, then the class of systems with tiles of shape is computationally universal.

Theorem 3.1

Let be a regular polygon with sides such that . Then for every standard Turing machine and input , there exists a directed TAS with consisting only of tiles of shape that simulates on .

The following theorem states that if we are allowed two different regular polygons as tile shapes, then the class of systems consisting only of these two shapes is computationally universal.

Theorem 3.2

Let and be regular polygons with and sides of equal length. Then for every and such that , and every standard Turing machine with input , there exists a directed 2-shaped system consisting only of tiles of shape or that simulates on .

The next theorem differs from the previous two theorems in that it discusses the computational power of polygons which are not regular. Roughly, it states that if we relax the condition that the polygon is regular (but still equilateral), then there exist polygons with only four sides which are capable of composing a class of computationally universal single shape systems. It also implies this for shapes with five and six sides as well.

Theorem 3.3

Let be a standard Turing machine with input . Then for all , there exists an equilateral polygon with sides and a directed single-shaped system consisting only of tiles of shape that simulates on .

Our final positive result shows that there exists a class of single-shaped systems of obtuse isosceles triangle which is computationally universal.

Theorem 3.4

Let be a standard Turing machine with input . Then, there exists an obtuse isosceles triangle and a directed single-shaped system consisting only of tiles of shape that simulates on .

We now state the negative result, which is based on the fact that regular polygonal tiles with sides cannot form paths capable of blocking each other in specific ways allowing important geometric information encoding and decoding.

Theorem 3.5

Let be such that . Then, there exists no temperature 1 single-shaped polygonal tile assembly system where for all , is a regular polygon with sides, and a bit-reading gadget exists for .

Due to space constraints in this extended abstract, the proofs of most results are relegated to the Appendix. However, in the main body we now sketch an overview of how the positive results work and a portion of the proof of Theorem 3.1 for , which gives the general overall scheme for all of the positive results.

3.2 Bit-Reading Gadgets Overview

First, we discuss a primitive tile-assembly component that enables computation by self-assembling systems. This component is called the bit-reading gadget, and essentially consists of pre-existing assemblies, bit writers, that appropriately encode bit values (i.e., or ) and paths that grow past them and are able to “read” the values of the encoded bits; this results in those bits being encoded in the tile types of the paths beyond the encoding assemblies. The notion of bit-reading gadget was defined in [11]. For completeness, we present the definition here and note that the definition applies even to systems of polygonal tiles. Figure 1 provides an intuitive overview of a temperature-1 system with a bit-reading gadget. Essentially, depending on which bit is encoded by the assembly to be read, exactly one of two types of paths can complete growth past it, implicitly specifying the bit that was read. It is important that the bit reading must be unambiguous, i.e., depending on the bit written by the pre-existing assembly, exactly one type of path (i.e., the one that denotes the bit that was written) can possibly complete growth, with all paths not representing that bit being prevented. Furthermore, the correct type of path must always be able to grow. Therefore, it cannot be the case that either all paths can be blocked from growth, or that any path not of the correct type can complete, regardless of whether a path of the correct type also completes, and these conditions must hold for any valid assembly sequence to guarantee correct computation.

The key to the correct functioning of a bit-reading gadget at temperature-1, where glue cooperation is not available and one source of “input” to the growing bit-reader must instead be provided by geometry, in the form of geometric hindrance which prevents exactly one path from continuing growth but allows another to proceed, is the fact that it must work when reading either of two different bit values. Using Figure 1 as a guide, one can see that it is easy to read the “1” bit in this example by blocking the blue path. However, the difficulty which is encountered is in correctly blocking the yellow path while allowing the blue to continue in order to read a “0” bit. With square tiles (and as we show, several others), this is in fact impossible. However, with most polygonal tiles this can be accomplished by careful design of paths and blocking assemblies so that a gap remains between the blocked path and the blocking assembly in such a way that the other path can assemble through the gap. The techniques for accomplishing this will be demonstrated throughout this paper.

Figure 1: Abstract schematic of a bit-reading gadget. (Left) The blue path grown from “reads” the bit 0 from (by being allowed to grow to and placing a tile ), while the yellow path (which could read a 1 bit) is blocked by . (Right) The yellow path grown from reads the bit 1 from , while the blue path that could potentially read a 0 is blocked by . Clearly, the specific geometry of the used polygonal tiles and assemblies is important in allowing the yellow path in the left figure to be blocked without also blocking the blue path.

3.3 Grid assemblies

As we will see in Section 3.4, our construction to simulate a Turing machine with a Polygonal TAM system consisting of the polygon will require us to string together several bit writers which we will then read with a series of bit readers. In order to ensure that the path which is assembling the bit readers is placing the bit readers at the correct positions, we need to keep track of where the bit writers are located. We accomplish this by constructing a lattice in the plane with . We can then place our bit writers at periodic positions in this lattice so that the path which is assembling the bit readers will know where to place the bit readers.

3.4 Turing machine simulation

Let be a Turing machine and let be some input to . Figure 2 shows a high-level schematic diagram of how a Polygonal TAM system simulates on input . The input is encoded as a sequence of bit writers with spacers placed in between them (shown at the bottom of Figure 2 as shaded regions labeled with an “s”). These spacers allow for our bit readers to shift back on grid without encroaching on the territory of other bit writers. As indicated by the arrows in Figure 2, bit readers then “read” the bit writers corresponding to the inputs. Growth proceeds by growing to the north (shown as a dark unlabeled region in Figure 2, and then a bit writer is assembled depending on what was read by the bit reader. After assembling the bit writer above, growth then continues by growing a path so that the next bit writer can be “read” (shown as the lightly shaded region labeled “wr” in Figure 2. This growth continues until the last bit of the row is encountered at which point, the bit reader begins “reading” the next row. Each row of bit writers can be thought of as representing the tape of . The symbols on the tape and location of the head of are all encoded in geometry as bit writers. If the head is not located at the set of bit writers the bit reader is currently reading, the symbols represented by the bit writers are simply rewritten as bit writers in the row above. Otherwise, the transition may be carried out by writing the new symbol on the tape specified by the transition function of in the row above as a sequence of bit writers. Also, bit writers are assembled to indicate that the head has moved as specified by the transition function. See  [11] for most complete exposition on this technique.

Figure 2: Schematic of simulating a Turing machine with bit-reading gadgets (from [11]).

Thus, to show our positive results, our task has become to 1) show that bit reading gadgets exist for the claimed systems and 2) show that we can string them together. The first task is accomplished in Section 6 and the grid which allows us to show the latter is shown in Section 5.

Given an -sided regular polygon where , a Turing machine and an input , Algorithm 1 shows a high-level schematic view of an algorithm that produces a single shape Polygonal TAM system which simulates the Turing machine on input and consists of tiles of shape . Note that here, we are abstracting the way in which the mathematical structures appearing in the algorithm are represented. In Section 5, we give a construction which implicitly defines an algorithm which we call FORM_GRID. This algorithm takes an integer as input and returns a grid formed by the -sided regular polygon. Given a grid and an -sided regular polygon, in Section G our construction implicitly gives an algorithm which we call FORM_GADGETS, that takes a grid and an integer , and produces a normalized bit-reading gadget. Once we have a normalized bit reading gadget, we can use the algorithm implicitly described in Section 3.2 of [11], which we call INITIALIZE, that produces a system, say , which grows a geometric representation of the input . Finally, also in Section 3.2 of [11], an algorithm is implicitly given, which we call TRANSITION_TILES, that returns a set of tiles which are added to so that the system is able to simulate a transition of the Turing machines .

Data: , ,
Result: Tile assembly system which simulates on
FORM_GRID(n);
FORM_GADGETS(, n);
INITIALIZE(, , , );
TRANSITION_TILES(, , );
return ;
Algorithm 1 High level algorithm for constructing a system which simulates on .

4 Regular Polygonal Tile Analysis With Complex Roots

In order to construct the grid assemblies and to show the correctness of the bit-reading gadgets we must show that the grid configurations and the bit-reading gadget configurations result in a valid assembly. In other words, we must show that the intersection of the interiors of any two distinct polygonal tiles in the configuration is empty. Moreover, in order to show that this assembly is indeed a valid bit-reading gadget we show that in the presence of the bit writer tiles, only one of two bit reading assemblies (representing either a or a ) can assemble depending on the bit writer tiles.

To prove that each bit-reading gadget configuration can be used to obtain a valid assembly, we must compute the distances from the center of a given polygon to the center of another polygon. For convenience, we assume that the length of the apothem (the line segment from the center of a polygon to the midpoint of one of its sides) of all of the regular polygons is , so that the distance from the centers of abutting polygons is . Then, let be a polygonal tile, and let be a polygonal tile that abuts . We say that a polygonal tile has the standard orientation if after being translated so that it is centered at the origin, it has a side that corresponds to a vertical line segment with midpoint at . See Figure (a)a for a depiction of a polygonal tile with standard orientation that is also centered at the origin. For a polygonal tile with an odd number of sides, we say that a polygonal tile has negated orientation if after being translated so that it is centered at , it is the reflection of a tile which has standard orientation across the imaginary axis. This is depicted in Figure (b)b.

(a)
(b)
Figure 3: Regular polygonal tile orientations

We enumerate the sides of counter-clockwise starting from the side corresponding to and ending at where is the number of sides of . Similarly, if has negated orientation, then we enumerate the sides as as shown in Figure (b)b. Then, relative to , if abuts along , then the center of is . In general, for , if abuts along , then the center of is . For the calculations in the following sections, it is convenient to identify with the complex plane so that is identified with . Then according to Euler’s formula, corresponds to the complex number . In other words, when has standard orientation, the centers of abutting polygons correspond to complex roots of unity, as the centers correspond to the roots of the complex polynomial (recall that is the number of sides of ). Now let . Then these roots of unity are . See Figure 7 for an example in the heptagonal tile case. Finally, notice that if has negated orientation and abuts along , then the center of is , and so the center of corresponds to .

Figure 4: Relative to , the center of corresponds to and the center of corresponds to .

Now let be a TAS with tiles of a single regular polygon shape, and let be an assembly in such that contains a tile, , with standard orientation and let be any tile in (including ). Then, since addition (respectively, subtraction) of complex numbers corresponds to vector addition (respectively, subtraction) in , the center of corresponds to some polynomial in with integer coefficients. See Figure 4 for an example of the correspondence to the centers of heptagonal tiles to such polynomials.

5 Overview of Polygonal Grid Construction

Given a regular polygon , a junction polyform is constructed in the following manner. We begin with a polygon in standard position centered at the origin. Starting from side , we traverse the sides of the polygon counterclockwise until we come across the edge where is such that and for all such that . We place our next polygons of type in non-standard positions centered at locations and as shown in Figure (a)a. Call this shape . We create a new shape by reflecting across the line . We then take the union of the shapes and obtaining our junction polyform shown in Figure (b)b.

(a)

(b)
Figure 5: Constructing a junction polyform.

We form a “grid” of these junction polyforms by attaching an infinite number of them to each other so that the polygons with sides labeled “a” are adjacent to each other and the polygons labeled “b” are adjacent to each other.

6 Bit-reading Gadgets Overview

In the cases where tiles consist of regular polygons with or more sides, we give a general scheme for obtaining bit-reading gadgets for each case. Figure 6 depicts the bit-reading gadgets for each case. The others are handled explicitly in the technical appendix. For the top configurations of Figure 6, note that since each polygonal tile of these bit-reading gadgets is adjacent to another tile, we need only show that for each top configuration depicted in Figure 6, of the two exposed glues, and of the tile , prevents a tile from binding to . In the bottom configurations of Figure 6, we not only need to show that prevents a tile from binding to , but we must also show that does not prevent a tile (the tile centered at in the bottom configurations for Figure 6) from binding to the tile that binds to . The latter statement ensures that when we use the bit-reading gadgets obtained from these configurations to simulate a Turing machine, in the case that a is read by attaching a tile to , does not prevent further growth of an assembly.

(a)

(b)

(c)
Figure 6: Bit-reading gadget portions. (top) Reading a and preventing placement of a tile at , (bottom) Reading a and preventing placement of a tile at .

Now, consider a polygon with sides and let be the root of unity . Then, the general scheme for constructing a bit-reading gadget falls into two cases. First, if is odd (the cases where is even are similar), relative to a tile with negated orientation (the polygon labeled in the configurations in Figure 6), the two configurations that give rise to the bit-reading gadget are as follows. Let be such that ( if is even). Referring to the top configurations of Figure 6, to “write” a , the configuration is obtained by centering a blocker tile with negated orientation, labeled , at (whether is even or odd) relative to . Then to “read” a , exposes two glues and such that if a tile binds to , it will have standard orientation and be centered at (whether is even or odd) and if a tile binds to , it will have standard orientation and be centered at . We will show that will prevent this tile from binding. This gives the configuration depicted in the top figures of Figure 6. Now, referring to the bottom configurations of Figure 6, to “write” a , the configuration is obtained by centering a blocker tile with negated orientation, labeled , at ( if is even) relative to . In this case, we will show that prevents a tile from binding to . In addition, we place a glue on the tile that binds to that allows for another tile to bind to it so that its center is at ( if is even) relative to . This gives the configuration depicted in the bottom figures of Figure (a)a and Figure (c)c. Moreover, we show that neither nor prevent the binding of this tile.

In order to perform the calculations used to show the correctness of these bit-reading gadgets, we consider the cases where is even and where is odd. Here we give brief version of the calculations that show that a regular polygon centered at and regular polygon centered at do not overlap when is odd. For more detail and calculations for the case where is even, see Section H.1.7.

Suppose that . We now refer to the bottom configurations of Figure (a)a. To show that a polygon centered at and a polygon centered at do not overlap, consider the case where is odd (the case where is even is similar). Note that relative to , and . Then the distance from to satisfies the following equation.

Substituting for and simplifying, we obtain . It is well known that for regular polygons with sides and apothem , the circumradius is given by . Hence, to show that a polygon centered at and a polygon centered at do not overlap, we show that for . (See Section H.1.7. It then follows that . Therefore, is greater than twice the circumradius of our polygons. Hence, a polygon centered at and a polygon centered at do not overlap. We then perform similar calculations to show that for , the configurations described in this above indeed give bit-reading gadgets.

Thus, we have shown that bit-reading gadgets can be formed, along with grids that allow bits to be written and read, using polygonal tiles with sides. Combined with standard tile assembly techniques to simulate Turing machines, this proves that such systems are computationally universal.

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Appendix

Appendix A Full Description of the Polygonal TAM

We now give a full description of the Polygonal TAM.

Polygonal Tiles

A simple polygon is a plane geometric figure consisting of straight, non-intersecting line segments or “sides” that are joined pair-wise to form a closed path. As is commonly the case, we omit the qualifier “simple” and refer to simple polygons as polygons. A polygon encloses a region called its interior. The line segments that make-up a polygon meet only at their endpoints. Exactly two edges meet at each vertex. We define the set of edges of a polygon to be the line segments that make-up a polygon. In our definition we find it useful to give a polygon a default position and rotation. First, we assume that the centroid, say, of any polygon is at the origin in . Then, for a polygon with edges, let be some vertex of such that . By possibly rotating about , we can ensure that and . For a given polygon and some vertex of that is not equal to the centroid of , we call this position and rotation the standard position for given .

A polygonal tile is a polygon with a subset of its edges labeled from some glue alphabet , with each glue having an integer strength value. Two tiles are said to be adjacent if they are placed so that two edges, one on each tile, intersect completely. Two tiles are said to bind when they are placed so that they have non-overlapping interiors and have adjacent edges with matching glues and matching lengths; each matching glue binds with force equal to its strength value. An assembly is any connected set of polygons whose interiors do not overlap such that every tile is adjacent to some other tile. 333As with the aTAM, the edges of two tiles of an assembly may intersect, but we do not allow for the interiors of two tiles of an assembly to have non-empty intersection. Given a positive integer , an assembly is said to be -stable or (just stable if is clear from context), if any partition of the assembly into two non-empty groups (without cutting individual polygon) must separate bound glues whose strengths sum to . We say that a tile is in standard position, if the underlying polygon defining the shape of the tile is in standard position. We also refer to the centroid of a polygonal tile as the centroid of the underlying polygon defining the shape of the tile.

Assembly Process

Given a tile-assembly system , we now define the set of producible assemblies that can be derived from , as well as the terminal assemblies, , which are the producible assemblies to which no additional tiles can attach. The assembly process begins from and proceeds by single steps in which any single copy of some tile may be attached to the current assembly , provided that it can be translated and/or rotated so that its placement does not overlap any previously placed tiles and it binds with strength . For a system and assembly , if such a exists, we say (i.e. grows to via a single tile attachment). We use the notation , when grows into via or more steps. Assembly proceeds asynchronously and nondeterministically, attaching one tile at a time, until no further tiles can attach. An assembly sequence in a TAS is a (finite or infinite) sequence of assemblies in which each is obtained from by the addition of a single tile. The set of producible assemblies is defined to be the set of all assemblies such that there exists an assembly sequence for ending with (possibly in the limit). The set of terminal assemblies is the set of producible assemblies such that for all there exists no assembly in which . A system is said to be directed if , i.e., if it has exactly one terminal assembly.

Appendix B Formal Definition of Bit-Reading Gadget

For the following definition is taken from [11] and modified slightly to account for the fact that polygonal tiles are placed in continuous, rather than discrete, space. Here and throughout the paper, if we refer to a tile having an (or ) coordinate , we are referring to its centroid being on the line (or ) for .

Definition 1

We say that a bit-reading gadget exists for a tile assembly system , if the following hold. Let and , with , be subsets of tile types which represent the bits and , respectively. For some producible assembly , there exist two connected subassemblies, (with equal to the maximal width of and , i.e., the largest extent in -direction spanned by either subassembly), such that if:

  1. is translated so that has its minimal -coordinate and its minimal -coordinate ,

  2. a tile of some type is placed at , where , and

  3. the tiles of are the only tiles of in the first quadrant to the left of ,

then at least one path must grow from (staying strictly above the -axis) and place a tile of some type as the first tile with -coordinate , while no such path can place a tile of type as the first tile to with -coordinate . (This constitutes the reading of a bit.)

Additionally, if is used in place of with the same constraints on all tile placements, is placed in the same location as before, and no other tiles of are in the first quadrant to the left of , then at least one path must grow from and stay strictly above the -axis and strictly to the left of , eventually placing a tile of some type as the first tile with -coordinate , while no such path can place a tile of type as the first tile with -coordinate . (Thus constituting the reading of a bit.)

We refer to and as the bit writers, and the paths which grow from as the bit readers. Also, note that while this definition is specific to a bit-reader gadget in which the bit readers grow from right to left, any rotation of a bit reader is valid by suitably rotating the positions and directions of Definition 1.

Appendix C Complex roots of unity example using heptagonal tiles

In this section, we give example assemblies using heptagonal tiles by computing the distances of relevant tile centers using roots of unity. Let . For a polygonal tile with standard orientation, Figure 7(a) depicts the complex roots of unity corresponding to the centers of adjacent tiles. Similarly, for a polygonal tile with negated orientation, Figure 7(b) depicts the negated complex roots of unity corresponding to the centers of adjacent tiles.

(a)
(b)
Figure 7: Representing the vector from the center of a heptagon (gray) to each center of an adjacent heptagon using the roots of unity.
Figure 8: Relative to , the center of corresponds to and the center of corresponds to .

If denotes a polygonal tile with standard orientation (the case of negated orientation is similar) in an assembly producible in a TAS , we can compute the centers of any polygonal tile in using complex addition and subtraction relative to the center of . Figure 8 shows the complex numbers corresponding to the centers of tiles and . First, corresponds to the center of . Then note that relative to , the center of corresponds to . Therefore, relative to , the center of corresponds to . In a similar fashion, given any two polygonal tiles, and , the center of relative to can be represented as a polynomial of with integer coefficients.

Figure 9: An example of computing the centers of heptagons using polynomials of complex roots of unity. The center of each heptagonal tile is labeled with a corresponding polynomial in . Glue labels are not shown.

For a more in depth example of computing the centers of heptagonal tiles, consider the following TAS. Let be the polygonal tile assembly system consisting of tile types all with shape of a single regular heptagon. Moreover, suppose that each tile type has two edges with strength-1 glues, and that there are glues appropriately defined so that starting from a single seed tile (the gray tile in Figure 9), the assemble proceeds until the closed “loop” of heptagonal tiles shown in Figure 9 assembles. At this point the assembly is terminal. Call this assembly . Then let be the seed tile. Keeping Figure 7 in mind, we can compute the centers of each polygonal tile in relative to . These are shown in Figure 9. In fact, we can even compute that the center of to obtain the polynomial , and note that this polynomial is reflecting the fact that is a closed “loop” of heptagonal tiles.

Appendix D Polygonal Grid Construction

Given a polygon , we now show how to form a lattice consisting of . This grid will act as a coordinate system for our polygonal TAM systems and allow us to string several bit reading gadgets together so that we may simulate any Turing machine on any input. In order to do this, we first show that we can construct a single polyform from which can “grid” the plane. It will then follow that we can form a lattice in the plane with by placing polygons at the same locations and with same orientations as the polygons composing the grid formed with polyforms.

We begin by describing the construction of the polyform which we will use to construct our grid. We then show that this is indeed a valid polyform. Next, we shown that there exists a polygonal system which can tile the grid formed by the polyform.

Before we begin our construction, it is necessary to introduce a couple of definitions.

Definition 2

Let be a regular polygon. A polyform is a connected shape in the plane which is constructed by combining a finite number of copies of so that the following requirements are met:

  1. the interior points of all instances of are disjoint

  2. every instance of completely shares a common edge with some other instance of .

The bounding rectangle around a polyform is the rectangle with minimal area that contains the interior points of .

d.0.1 Junction Polyforms

Given a regular polygon , a junction polyform is constructed in the following manner. We begin with a polygon which has standard orientation centered at the origin. Starting from side , we traverse the sides of the polygon counterclockwise until we come across the edge where is such that and for all such that . We place our next polygons of type with negated orientations centered at locations and as shown in Figure (a)a. Call this shape . We create a new shape by reflecting across the line . We then take the union of the shapes and obtaining our junction polyform shown in Figure (b)b. We call the polyform constant.

(a)
(b)
Figure 10: The construction of a junction polyform.

We now prove that this is indeed a valid polyform. First, we begin with some observations.

Observation D.1

For any with , there exists a point in the roots of unity such that .

For , this observation is mechanical. If , the observation must hold since the roots of unity are evenly spaced around the unit circle.

Observation D.2

Let be a regular polygon with sides in standard orientation. Also, let be such that and . Denote the vertices that compose side by and where is the counterclockwise most vertex and is the clockwise most vertex. Set . Then the following hold:

  1. if , then , and

  2. if , then .

This observation falls out of the fact that and must be orthogonal.

Observation D.3

Let be the polyform constant for some polyform composed of regular polygons with sides. Let be a regular polygon with sides centered at the origin in standard orientation. Then

  1. the clockwise most vertex that composes is a southernmost point in , and

  2. the location of the counterclockwise most vertex that composes , call this point , is such that .

To see the first part of this observation, note that . This along with the observation D.2 implies that the clockwise most vertex of side must lie to the north of the clockwise most vertex that composes . Note that the clockwise most vertex of side also must not lie to the south of the counterclockwise most vertex of side . Consequently, because is convex, the clockwise most vertex that composes is a southernmost point in .

The second part of this observation follows from Observation D.1 and the fact that a regular polygon in standard orientation centered at the origin will always have a vertex with an absent imaginary part and a real part that is less than 0.

Lemma 1

Let be a regular polygon, and let be the junction polyform constant obtained from the junction polyform composed of . Then the sets of interior points of the following polygons are pairwise disjoint: 1) the polygon in standard orientation centered at the origin, 2) the polygon with negated orientation centered at , and 3) the polygon with negated orientation centered at .

Proof

It follows from the discussion in Section 4 that the interior points of the polygon centered at the origin and the polygon centered at are disjoint. Also since the complex conjugate of a root of unity is also a root of unity, it follows from the discussion in Section 4 that the interior points of the polygon centered at the origin and the polygon centered at are disjoint.

It is left to show that the interior points of the two polygons centered at the roots of unity are disjoint. To see this, first note that it follows from Observation D.3 that no interior point of the polygon centered at the location has real part that is less than or equal to 0. Indeed, first note that the clockwise most vertex of side of the polygon centered at location will overlap the counterclockwise most vertex of side of the polygon centered at the origin by construction. It follows immediately from Observation D.3 that all interior points in the polygon centered at have imaginary parts greater than . Since the polygon centered at is a reflected copy of the polygon centered at , it follows that the interior points in this polygon have imaginary parts less than 0. Consequently, the interior points of the two polygons are disjoint.

Lemma 2

Given a regular polygon , the junction polyform constructed above is indeed a valid polyform.

Proof

To see that the junction polyform constructed above is a valid polyform, we check that all of the requirements in the definition of polyform are met. Since the center of polygons labeled “2” and “3” are each located at one of the roots of unity, it follows from the discussion in Section 4 that polygons labeled “1” and “2” as well as polygons labeled “1” and “3” are joined along a common edge and share that edge entirely. This same line of reasoning shows that the polygon labeled “4” is joined along a common edge and shares that edge entirely with the polygon labeled “1”. Since the shape formed by polygons labeled “4”, “5” and “6” is a reflection of the left side of the shape, all of the polygons are joined along a common edge and shares that edge entirely. It is readily seen from this argument that our shape is also connected.

It is now left to show that no two polygons in the shape overlap. We denote the polyform constant obtained from by . It follows from Lemma 1 that the interior points of the polygons labeled “1”, “2”, and “3” are pairwise disjoint. Since, the polygons labeled “4”, “5”, and “6” are a reflection of the polygons labeled “1”, “2”, and “3”, they too are pairwise disjoint. To show that the polygons in the two reflected halves of the shape are pairwise disjoint, first observe that the centers of the polygons labeled “2” and “3” have real parts less than or equal to the real part of the polygon labeled “1”. Consequently, after the reflection and “attachment” of the two halves, the polygons labeled “2” and “5” and the polygons labeled “3” and “6” have no less distance between each other than the polygons labeled “1” and “4”. Since the polygons labeled “1” and “4” have disjoint interior points, it follows that the polygons mentioned above have disjoint interior points. Consequently, no two polygons in the shape overlap.

d.0.2 Polygonal Grid Technical Lemmas

The following lemma will assist us in proving Lemma 4. Informally, it states that the bounding rectangle of the junction polyform described above and shown in Figure (b)b will “touch” sides of the polygons labeled “2” and “3” and sides of the polygons labeled “5” and “6”. This will imply that we can attach the polyform junctions by attaching sides of polygons labeled “5” and “6” to sides of polygons labeled “5” and “6”.

Lemma 3

Consider the polygons composing the junction polyform constructed above from some regular polygon (shown in Figure (b)b). Also, let be the bounding rectangle around . Let be the set of points consisting of the union of the following sets of points: 1) the set of boundary points on side of the polygon labeled “2”, 2) the set of boundary points on side of the polygon labeled “3”, 3) set of boundary points on side of the polygon labeled “5”, and 4) the set of boundary points on side of the polygon labeled “6”. Then .

Proof

We prove that the boundary points on side of the polygons labeled “4” and “6” in Figure (b)b lie on the bounding rectangle . The proof that the boundary points on side of the polygons labeled “2” and “3” lie on the bounding rectangle will then follow from a similar argument.

First, observe that for a polygon with standard position centered at the origin, the boundary points on side are the easternmost points contained in the polygon. Furthermore, all of these points lie on the line . Now note that by our construction of the junction polyform, one of the tiles labeled “5” and “6” will contain the easternmost point of the polyform. Indeed, let be the real part of the point in the center of the polygon labeled “4”. Since our construction ensures the real part of the point in the center of the polygon labeled “5” is of the form for , the polygon labeled “5” will contain a point as east or further east than the points in the polygon labeled “4”.

We claim that the polygons labeled “5” and “6” have centers with equal real parts. To see this, recall that the centers of the polygons labeled “2” and “3”have the same real parts since they are conjugates of each other. Since the polygons labeled “5” and “6” are in the same position relative to each other as the polygons labeled “2” and “3” just reflected across the line , it follows that the polygons labeled “5” and “6” have equal real parts.

From our construction of the junction polyform, it is clear that none of the polygons labeled “1”, “2”, or “3” have a point that is an easternmost point of the polyform. Thus, the sides of the polygons labeled “5” and “6” are all easternmost points of the polyform. Consequently, these points lie on the bounding box .

Observation D.4

Let be a regular polygon, be a polyform junction formed from , be the bounding rectangle for , and let be the polyform constant. Furthermore, let be the height of the bounding rectangle and let be the width of the bounding rectangle. Then, the following constraints hold for and : 1) and 2) .

Figure 11 shows the dimensions of the polyform. Note that the width of the polyform is clearly . To see that , note that by the way we constructed the junction polyform no interior points of the polyform can lie on the dotted lines shown in Figure 11. Since the distance between these two dotted lines is , it must be the case that .

Figure 11: The vectors showing the dimensions of the polyforms.

The next lemma states that given any regular polygon, we can form a a periodic grid of the plane.

Figure 12: The preformed assembly which is composed of the tile set of the system described in the proof of Lemma 4. The preformed assembly has two glues labeled “a” and “b” placed as shown.
Figure 13: An assembly formed by the system described in the proof of Lemma 4.
(a)
(b)
Figure 14: Choosing the vectors and .

d.0.3 Constructing the Polygonal Grid

Lemma 4

Given a regular polygon , there exists a directed, polygonal tile system (where the seed is centered at location and the tile set contains a tile ) and vectors , such that produces the terminal assembly , which we refer to as a grid, with the following properties. (1) Every position in of the form , where , is occupied by the tile , and (2) for every , the position in of the form is occupied by the tile .

Proof

For the first part of this proof, we think of our polygonal tile system as first forming the junction polyform before attaching it to our assembly. Later on in the proof, we will see that this is a valid assumption. Our tile set , will consist of tiles of shape that form the junction polyform with the glues labeled “a” and “b” exposed as shown in Figure 12. Note that for the first part of the proof we are essentially thinking of the assembly shown in Figure 12 as a tile. Thus, we refer to the junction polyform as a tile and we refer to a polygon composing the polyform as a pixel. More formally, a pixel in the polyform is a location in the complex plane given by the center of a tile in the polyform shown in Figure 10 (where we assume that the center of the tile labeled “1” is placed at the origin).

To begin, we position our single seed so that the polygon labeled “1” in Figure (b)b is centered at the origin. An assembly formed by such a system is shown in Figure 13.

Let be a junction polyform composed of the polygon and let be the polyform constant as discussed in the construction of the junction polyform. Set and . The intuition behind choosing these vectors is shown in Figure (a)a and Figure (b)b.

The following terminology is borrowed from [11]. Define for . Here, acts as a distinguished pixel that we use as a reference point. Then, for two polyforms and , we say that these polyforms are neighboring if and or and .

As in [11] we prove the following claim.

Claim: for all defines a grid of non-overlapping polyforms such that any two neighboring polyforms and contain pixels with a shared edge. Such a grid of polyforms is shown in Figure 13.

To begin, we show that if or , then the interior points of and are disjoint. Let and . In order to show that does not overlap , we show that 1) or 2) . Since, by Lemma D.4, these are the dimensions of the bounding box of , it will then follow that their interiors are disjoint.

We consider three cases 1) , 2) , and 3) . First note that

For case 1, observe that

In the case that , we have

Although case 3 is similar to case 1, we include it here for completeness. If , notice that

Now suppose that and are neighboring polyforms. First, suppose that and . We consider the case where and note that the case where is similar. Consider the polygons in the lower left hand corner of the bounding rectangle of the polyforms and denote this polygon . Note that the polygon in lies at a position

relative to the polygon in .

Now, notice that has a polygon that lies at position relative to in (this is the polygon that lies in the bottom right hand corner of the bounding box), and has a polygon that lies at position relative to in (this is the polygon that lies in the top left hand corner of the bounding box). Call the first pixel described and the latter . Observe that by the construction of the junction polyform, has standard orientation and has negated orientation. Furthermore, observe that lies at location

relative to . Since has standard orientation, has negated orientation and lies at position relative to , it follows from the discussion in Section 4 that polygon and polygon completely share a common edge.

Conversely, assume that and . We consider the case where , and, once again, note that the case where is similar. Notice that the polygon in lies at a position

relative to the polygon in .

Denote the polygon that lies at position relative to in by (this is the polygon that lies in the top right hand corner of the bounding box). Observe that, relative to polygon in , the polygon in lies at position

Since in has negated orientation, in has standard orientation, and lies at a position relative to , it follows from the discussion in Section 4 that polygon and polygon completely share a common edge.

Now, note that since none of the “polyform junction tiles” overlap, there are not any race conditions. Consequently, we can build the assembly described above by attaching one polygon tile at a time (instead of an assembly of polygons). The seed of our assembly will be the southwest tile of .

d.1 Grid Notation

For some polygon , we let denote the terminal assembly of the tile system given in Lemma 4 (i.e. the grid assembly obtained from ). Furthermore, for a tile system of shape , , and a tile of centered at the location , we say that is on grid with respect to if there exists a tile such that is centered at the location and has the same orientation of . If there does not exist such a , then we say that is off grid with respect to .

d.2 Normalized Bit-reading Gadgets

Let a bit reading gadget have the properties that: 1)the tile from which the bit writer begins growth is on grid, 2) the last tile to be placed in the bit writer is on grid, and 3) the tile from which the bit reader grows is also placed on grid. We call such a bit-reading gadget an on grid bit-reading gadget. A pair of normalized bit-writers and have the property that 1) and are the two bit writers for some bit reading gadget and 2) the location and position of the first tile placed in the two assemblies is the same as well as the location and position of the last tile placed. A normalized bit-reading gadget is an on grid bit-reading gadget with normalized bit-writers.

Appendix E Polygons Which “Can’t Compute” at Temperature 1

In this section, we prove Theorem 3.5 by showing a set of polygons for which it is impossible to create bit-reading gadgets at , namely regular polygons with less than 7 sides (i.e. equilateral triangles, regular pentagons, and regular hexagons), as this was already shown to be true for squares in [11]. This provides a sharp dividing line, since we have shown that all regular polygons with sides can form bit reading gadgets, and thus are capable of universal computation, at .

We now restate the Theorem for completeness and give its proof.

Theorem E.1

Let be such that . Then, there exists no temperature 1 single-shaped polygonal tile assembly system where for all , is a regular polygon with sides, and a bit-reading gadget exists for .

To prove Theorem E.1, we break it into two main cases and prove lemmas about (1) equilateral triangles and hexagons, and (2) pentagons.

e.1 Equilateral triangles, squares, and regular hexagons

Equilateral triangles, squares, and regular hexagons are all capable of tessellations of the plane. That is, using tiles of only one of those shapes it is possible to tile the entire plane with no gaps. (As a side note, these are the only regular polygons which can do so.) In a system consisting of tiles of only one of those shapes, all tiles must be placed into positions aligning with a regular grid (i.e. no tile can be offset or rotated from the grid). It was shown in [11] that squares cannot form bit-reading gadgets at , and because of the tessellation ability of equilateral triangles and regular hexagons and their restriction to fixed grids, the proof of [11] can be extended in a straightforward way to also prove that equilateral triangles and regular hexagons cannot form bit reading gadgets at . Thus, the following proof is nearly identical to that for squares of [11].

Lemma 5

There exists no temperature 1 polygonal tile assembly system where for all , is an equilateral triangle, and a bit-reading gadget exists for .

Lemma 6

There exists no temperature 1 polygonal tile assembly system where for all , is a regular hexagon, and a bit-reading gadget exists for .

Proof

We prove Lemmas 5 and 6 by contradiction. Also, since each will use exactly the same arguments, we will prove both simultaneously and note the single location in the proof where the shapes of the tiles is relevant. Therefore, assume that there exists a single-shape system such that has a bit-reading gadget. (Without loss of generality, assume that the bit-reading gadget reads from right to left and has the same orientation as in Definition 1.) Let be the coordinate of the tile from which the bit-reading paths originate (recall that it is the same coordinate regardless of whether or not a or a is to be read from or , respectively). By Definition 1, it must be the case that if is the only portion of in the first quadrant to the left of , then at least one path can grow from to eventually place a tile from at (without placing a tile below or to the right of ). We will define the set as the set of all such paths which can possibly grow. Analogously, we will define the set of paths, , as those which can grow in the presence of and place a tile of a type in at . Note that by Definition 1, neither nor can be empty.

Since all paths in and begin growth from at and must always be to the left of , at least the first tile of each must be placed in location . We now consider a system where is placed at and is the only tile in the plane (i.e. neither nor exist to potentially block paths), and will inspect all paths in and in parallel. If all paths follow exactly the same sequence of locations (i.e. they overlap completely) all the way to the first location where they place a tile at , we will select one that places a tile from as its first at and call this path , and one which places a tile from as its first at and call it . This situation will then be handled in Case (1) below. In the case where all paths do not occupy the exact same locations, then there must be one or more locations where paths branch. Since all paths begin from the same location, we move along them from in parallel, one tile at a time, until the first location where some path, or subset of paths, diverge. At this point, we continue following only the path(s) which take the clockwise-most branch. We continue in this manner, taking only clockwise-most branches and discarding other paths, until reaching the location of the first tile at . (Figures (a)a and (a)a show examples of this process.) We now check to see which type(s) of tiles can be placed there, based on the path(s) which we are still following. We again note that by Definition 1, some path must make it this far, and must place a tile of a type either in or there. If there is more than one path remaining, since they have all followed exactly the same sequence of locations, we randomly select one and call it . If there is only one, call it . Without loss of generality, assume that can place a tile from at that location. This puts us in Case (2) below.

(a)

(b)
Figure 15: Failed bit-readers with equilateral triangles.

(a)

(b)
Figure 16: Failed bit-readers with regular hexagons.

Case (1) Paths and occupy the exact same locations through all tile positions and the placement of their first tiles at . Also, there are no other paths which can grow from , so, since by Definition 1 some path must be able to complete growth in the presence of , either must be able to. Therefore, we place appropriately and select an assembly sequence in which grows, placing a tile from as its first at . This is a contradiction, and thus Case (1) cannot be true.

Case (2) We now consider the scenario where has been placed as the bit-writer according to Definition 1, and with at . Note that path must now always, in any valid assembly sequence, be prevented from growing to since it places a tile from at , while some path from must always succeed. We use the geometry of the paths of and path to analyze possible assembly sequences.

We create a (valid) assembly sequence which attempts to first grow only from (i.e. it places no tiles from any other branch). If reaches , then this is not a valid bit-reader and thus a contradiction. Therefore, must not be able to reach , and since the only way to stop it is for some location along to be already occupied by a tile, then some tile of must occupy such a location. This means that we can extend our assembly sequence to include the placement of every tile along up to the first tile of occupied by , and note that by the definition of the regular grid of equilateral triangle tiles, or of regular hexagon tiles, some tile of must now have a side adjacent to some tile of . At this point, we can allow any paths from to attempt to grow. However, by our choice of as the “outermost” path due to always taking the clockwise-most branches, any path in (and also any other path in for that matter) must be surrounded in the plane by , , and the lines and (which they are not allowed to grow beyond), and thus cannot be connected and extend beyond that boundary. (Examples can be seen in Figures (b)b and (b)b.) Therefore, no path from can grow to a location where without colliding with a previously placed tile or violating the constraints of Definition 1. (This situation is analogous to a prematurely aborted computation which terminates in the middle of computational step.) This is a contradiction that this is a bit-reader, and thus none must exist. ∎

e.2 Regular pentagons

Because regular pentagons don’t tessellate the plane, the proof that they can’t form bit-reading gadgets is slightly different than for equilateral triangles, squares, and regular hexagons. However, the fact that they can only bind in two relative rotations and the ratio of their side lengths to perimeters ensure that they are still unable to form bit-reading gadgets due to the fact that it is still impossible for one path of regular pentagons to be blocked from continued growth without trapping all other paths on one side. This means that the “outermost” path, along with any part of the bit-writer which blocks its full growth, can always prevent any inner paths from sufficient growth.

Lemma 7

There exists no temperature 1 polygonal tile assembly system where for all , is a regular pentagon, and a bit-reading gadget exists for .

Proof

The proof of Lemma 7 is nearly identical to that for Lemmas 5 and 6, with the only slight change being due to the fact that regular pentagons aren’t constrained to a single fixed grid. First, because of this we will slightly adapt Definition 1 so that rather than requiring tiles to be at specific discrete coordinates, they instead are constrained by lines in . For instance, we no longer require the bit-reader to grow a path to -coordinate , but instead just beyond a set vertical line for some . (without loss of generality we’ll assume for that constraint.) This change is merely a technicality and does not affect the proof, and therefore, we will use the previous proof up to the point where Case (2) makes the argument that the regular grid of tiles ensures that the last tile which can be placed along must have an edge adjacent to a tile of . Due to the lack of such a grid, we will now only be able to guarantee that some portion of the next position of , i.e. the location where first prevents the addition of another tile (which we will now refer to as location ), is occupied by a tile of (whose location we will now refer to as . Referring to the location of the last tile which can be placed on as , by the fact that would have been a connected path which included , and that the tile at prevents its placement, the location must consist of the area of a tile oriented so that it has an edge ad