CMS pixel upgrade project
The LHC machine at CERN finished its first year of pp collisions at a center of mass energy of 7 TeV. While the commissioning to exploit its full potential is still ongoing, there are plans to upgrade its components to reach instantaneous luminosities beyond the initial design value after 2016. A corresponding upgrade of the innermost part of the CMS detector, the pixel detector, is needed. A full replacement of the pixel detector is planned in 2016. It will not only address limitations of the present system at higher data rates, but will aggressively lower the amount of material inside the fiducial tracking volume which will lead to better tracking and b-tagging performance. This article gives an overview of the project and illuminates the motivations and expected improvements in the detector performance.
CMS pixel upgrade project
Hans-Christian Kästli††thanks: Speaker. ††thanks: On behalf of the CMS pixel community.
Paul Scherrer Institut
After the technical commissioning in 2009, the CMS detector  just finished its first year of physics data taking with good success. Its tracking device consisting of a pixel vertex detector and roughly 200 m of silicon strip detectors performs as expected and in many respects reached already the design values .
The commissioning of the LHC machine progresses very well and a peak luminosity at the design value of cm s is expected before 2015. In the following shut down the LHC machine and its injector chain will be upgraded in order to reach at least twice this value. This is called the phase I upgrade. A phase II upgrade is under consideration. Its time scale is much more uncertain but it is expected to take place in the early 2020s where the LHC should reach a luminosity larger than cm s.
Corresponding upgrades of the CMS detector are necessary. This article gives an overview of the phase I upgrade of the CMS pixel detector. The phase II upgrade of the entire tracker is still in its early conceptual phase and is not described here.
Once the LHC machine reaches a mode of operation which goes beyond its initial design goal the CMS tracking detector faces two main issues.
The hit occupancy increases. This causes an increase in data loss due to buffer size limitations and limited readout data bandwidth. At an instantaneous luminosity of cm s this becomes inadequate for the present pixel detector. Changes in the front end electronics and in the data links are needed.
Parts of the pixel detector will have to be replaced before the end of the phase I running period due to radiation induced damage of sensors and readout electronics . At the time of writing, the planned total LHC integrated luminosity up to 2020 is 340 fb corresponding to 1 MeV neutron equivalent for layer 1. In the TDR the modules are specified up to 1 MeV n.e. While the detector will remain efficient for at least twice this dose the spacial resolution will gradually decrease due to the reduction of the Lorentz angle with higher bias voltages .
With higher track densities tracking becomes more and more time consuming. The track fake rate grows rapidly due to the large extrapolation distance from pixel track seeds to the first strip detector layer (see below, i.e. figure 7) . In the barrel this is from 10.3 cm (outermost pixel layer) to 25.5 cm (innermost TIB layer). An intermediate pixel layer is highly desirable.
In addition there are physics driven arguments for an upgrade.
Due to multiple scattering any material inside the fiducial tracking volume decreases the impact parameter resolution. This is illustrated in figure 1. For low momentum tracks (shown are tracks around 1 and 3 GeV) 18 peaks are clearly visible in the transverse impact parameter resolution as a function of , which correspond to the 18 cooling pipes of the innermost pixel barrel layer. The upgraded pixel detector features a mechanical structure which is consequently tuned for low mass.
For purely geometrical reasons a reduction in the radius of the innermost tracking layer will further improve the impact parameter resolution. A reduction from today’s 44 mm to 39 mm is foreseen and further reductions with smaller beam pipe radii are currently under study.
2 Mechanical design
The proposed upgraded pixel system is sketched in figure 2 right. It consists of three disks on each side and four barrel layers. For comparison the present 2+2 disk/3 barrel layer system is shown on the left. The large reduction in material can be achieved based on 2 main ideas:
Change of the cooling system to a 2 phase CO cooling. The present CF monophase cooling with its piping accounts for approximately of the total material budget per layer in the central region . The benefit of CO is twofold. First, the mass density of the bi-phase CO is lower than for CF. Second, with the high latent heat of the CO much less mass flow at a higher pressure is needed leading to smaller pipes. Pipes with a diameter of 1.5 mm and a wall thickness of 50 m are foreseen. The amount of material needed for cooling (pipes plus coolant) for the ladders of the entire barrel pixel detector will go down by a factor of 10 to about 164 g.
Relocation of material out of the fiducial tracking volume towards higher values and complete removal of circuit and connector boards from the barrel end flange region. Barrel modules will have longer pigtail cables which reach out to a region of the supply tube above .
A prototype of the first layer barrel mechanics and its supply tube has been built. Photographs of the two objects are shown in figure 3. A disk of the endcap detector will consist of two inner and two outer halfrings (see figure 4). It will consist of only one type of modules consisting of 16 readout chips. On an outer (inner) half ring 34 (22) modules will be mounted. More details can be found in , .
The expected distribution of material in the pixel detector is plotted in figure 5. Shown is the thickness of the barrel detector in radiation length (left) and nuclear interaction length (right). In spite of the additional barrel layer, the material budget is reduced by 20 % at =0 and by more than 50 % in the region . The amount of material in the region will be reduced by a factor of 2.6 from today’s 16.9 kg to 6.5 kg.
3 Sensor and electronics
The pixel size of the new design remains at m (in r-z). The sensor technology will again be “n-in-n” planar silicon. The exact choice of sensor material (DOFZ, MCZ, …) can be postponed to the moment of ordering.
The new design has several implications on the readout electronics. It can be divided in two sections: services and readout chips
The number of channels will be increased by almost a factor 2 to 125M pixels (today 66M pixels). While there have been services foreseen for the disks from the beginning, the new 4 layer barrel detector has to reuse the same services as the present 3 layer system with the addition of a small number of spares, i.e. the same number of power cables, cooling pipes and optical fibres. This implies the following changes:
Change of cooling system as described above. The present CF cooling system will not be able to supply enough cooling capacity to the larger detector system.
Faster data links. Since the data of twice as many channels need to be transmitted over almost the same number of optical fibres, the link bandwidth needs to be increased. This seems very difficult on the basis of the present analog links. Therefore low power high speed (320 MHz) digital links are under development .
Alternative powering scheme. Since considerably more power has to be provided over almost the same number of power cables, the power loss in the cables become unacceptably high unless the power is supplied at a higher voltage. A DC-to-DC conversion scheme has been chosen and is under development .
3.2 Readout chip
The present readout chip (ROC) has been designed to be efficient at the nominal LHC luminosity of cm s . It is inappropriate for a peak luminosity of cm s. Data flow simulations show, that for the innermost layer the pixel hit recording efficiency would drop below 65 %. However, the limitations are not inherent to the architecture chosen. Therefore an evolution of the present ROC is under design () which will overcome these limitations. There are mainly four aspects:
Trigger latency buffers. Pixel hits need to be stored inside the ROC during the level 1 trigger decision time (s). The size of these buffers need to be adjusted to the higher data rates. This has been done.
Pixel readout. Trigger validated hits need to be read out. Dead time of a double column (a ROC is organized in 26 double columns with 160 pixels each) starts with a trigger validation and ends when the validated hits are read out. A fast removal of the hits from the double column is therefore desirable. Today, all double columns within a ROC are daisy chained for readout as well as 8 ROCs on a module, aggregating to a readout chain of 208 double columns. Readout time and hence dead time increases along this chain, leading to a mean inefficiency of at the design LHC luminosity. This inefficiency further grows to an unacceptably high value of 16 % at cm s. The solution is to break up the daisy chain on the module level. The situation is shown in figure 6. It shows the length of a readout (in number of pixels) of different structures (double column, ROC, module) for 1 and cm s, the later for the worst case of 50 ns LHC bunch structure or a mean of 100 pile up events per bunch crossing. As expected for uncorrelated pile up events, the local event size (within a ROC) is very similar with a large difference showing up on a larger scale (module level). This justifies to break up the daisy chain between ROCs, leaving the readout scheme inside the ROC unaltered. It requires the addition of a buffer stage on the ROC level. The hits from the double columns are written into this readout buffer instead of sent off detector directly. Hits in this buffer are read out at a later time, not leading to further dead time, since the double column already resumed data taking. From simulations we expect the inefficiency to drop to 6 % for layer 1 in this new scheme.
Digital output. In order to transmit data faster to the data acquisition units the present analog links are abandoned and changed to 160/320 MHz digital links. Therefore a fast ADC is needed on chip with the corresponding supporting circuits (like a PLL to generate higher clock frequencies or a data serializer and line drivers).
The changes described so far will not alter the core of the ROC which is very well tested and debugged. Notably this includes the pixel cell. This chip is the baseline for the phase I upgrade and a submission is planned for summer 2011. In order to reduce the inefficiency even further changes to the complicated double column logic are needed. It is currently under consideration and eventually will be submitted in 2012.
Double column dead time and reset. In order to eliminate the double column dead time completely a more intelligent logic is needed. Today, the double column stops data taking after trigger validation in order to avoid overwriting of valid data. After readout a reset is issued to ensure synchronisation and data integrity. This could be avoided if the data buffer logic would protect buffer cells containing valid data without stopping data acquisition. However, this means a complete redesign of the double column logic with the corresponding time consuming test phase in laboratory and high rate test beams. It is currently under design at PSI.
4 Expected performance
The new geometry (as far as it is known today) has been implemented in GEANT4 to simulate the detailed detector response within the official CMS software framework. The tracking efficiency together with the track fake rate as a function of and p is shown in figure 7 for events with a number of pile up interactions corresponding to an instantaneous luminosity of . As can be seen with the new geometry the tracking efficiency will be improved by about 20% and at the same time the track fake rate will be drastically reduced by up to an order of magnitude. This is due to the 4 hit coverage up to where pixel hit quadruples and triplets are used for track seeding.
The drastic reduction in material within the fiducial tracking region is expected to lead to an improved impact parameter resolution. Figure 8 shows the simulated transverse impact resolution of the old and new system as a function of p in the transition region between barrel and forward pixel detectors. The gain in resolution is of the order of 30% for tracks with a p around 5 GeV.
Finally preliminary studies of the b-tagging efficiency have been carried out. In figure 9 the performance of the standard b-tagging algorithm  in CMS is shown. At b jet tagging efficiency the light jet rejection rate will go up from today 90 % to about 98 % for the proposed system. Or conversely at a constant light jet rejection rate of 90 % the signal efficiency for b jets will increase by 23 % from 70 % to 86 %.
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