A Bio-inspired Redundant Sensing Architecture

A Bio-inspired Redundant Sensing Architecture

Anh Tuan Nguyen, Jian Xu and Zhi Yang
Department of Biomedical Engineering
University of Minnesota
Minneapolis, MN 55455
yang5029@umn.edu
Abstract

Sensing is the process of deriving signals from the environment that allows artificial systems to interact with the physical world. The Shannon theorem specifies the maximum rate at which information can be acquired [2]. However, this upper bound is hard to achieve in many man-made systems. The biological visual systems, on the other hand, have highly efficient signal representation and processing mechanisms that allow precise sensing. In this work, we argue that redundancy is one of the critical characteristics for such superior performance. We show architectural advantages by utilizing redundant sensing, including correction of mismatch error and significant precision enhancement. For a proof-of-concept demonstration, we have designed a heuristic-based analog-to-digital converter - a zero-dimensional quantizer. Through Monte Carlo simulation with the error probabilistic distribution as a priori, the performance approaching the Shannon limit is feasible. In actual measurements without knowing the error distribution, we observe at least 2-bit extra precision. The results may also help explain biological processes including the dominance of binocular vision, the functional roles of the fixational eye movements, and the structural mechanisms allowing hyperacuity.

 

A Bio-inspired Redundant Sensing Architecture


  Anh Tuan Nguyen, Jian Xu and Zhi Yang Department of Biomedical Engineering University of Minnesota Minneapolis, MN 55455 yang5029@umn.edu

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noticebox[b]30th Conference on Neural Information Processing Systems (NIPS 2016), Barcelona, Spain.\end@float

1 Introduction

Visual systems have perfected the art of sensing through billions of years of evolution. As an example, with roughly 100 million photoreceptors absorbing light and 1.5 million retinal ganglion cells transmitting information [3, 4, 5], a human can see images in three-dimensional space with great details and unparalleled resolution. Anatomical studies determine the spatial density of the photoreceptors on the retina, which limits the peak foveal angular resolution to 20-30 arcseconds according to Shannon theory [2, 3]. There are also other imperfections due to nonuniform distribution of cells’ shape, size, location, and sensitivity that further constrain the precision. However, experiment data have shown that human can achieve an angular separation close to 1 arcminute in a two-point acuity test [6]. In certain conditions, it is even possible to detect an angular misalignment of only 2-5 arcseconds [7], which surpasses the virtually impossible physical barrier. This ability, known as hyperacuity, has baffled scientists for decades: what kind of mechanism allows human to read an undistorted image with such a blunt instrument?

Among the approaches to explain this astonishing feat of human vision, redundant sensing is a promising candidate. It is well-known that redundancy is an important characteristic of many biological systems, from DNA coding to neural network [8]. Previous studies [9, 10] suggest there is a connection between hyperacuity and binocular vision - the ability to see images using two eyes with overlapping field of vision. Also known as stereopsis, it presents a passive form of redundant sensing. In addition to the obvious advantage of seeing objects in three-dimensional space, the binocular vision has been proven to increase visual dynamic range, contrast, and signal-to-noise ratio [11]. It is evident that seeing with two eyes enables us to sense a higher level of information as well as to correct many intrinsic errors and imperfections. Furthermore, the eyes continuously and involuntarily engage in a complex micro-fixational movement known as microsaccade, which suggests an active form of redundant sensing [12]. During microsaccade, the image projected on the retina is shifted across a few photoreceptors in a pseudo-random manner. Empirical studies [13] and computational models [14] suggest that the redundancy created by these micro-movements allows efficient sampling of spatial information that can surpass the static diffraction limitation.

Both biological and artificial systems encounter similar challenges to achieve precise sensing in the presence of non-ideal imperfections. One of those is mismatch error. At a high resolution, even a small degree of mismatch error can degrade the performance of many man-made sensors [15, 16]. For example, it is not uncommon for a 24-bit analog-to-digital converter (ADC) to have 18-20 bits effective resolution [17]. Inspired by the human visual system, we explore a new computational framework to remedy mismatch error based on the principle of redundant sensing. The proposed mechanism resembles the visual systems’ binocular architecture and is designed to increase the precision of a zero-dimensional data quantization process. By assuming the error probabilistic distribution as a priori, we show that precise data conversion approaching the Shannon limit can be accomplished.

As a proof-of-concept demonstration, we have designed and validated a high-resolution ADC integrated circuit. The device utilizes a heuristic approach that allows unsupervised estimation and calibration of mismatch error. Simulation and measurement results have demonstrated the efficacy of the proposed technique, which can increase the effective resolution by 2-5 bits and linearity by 4-6 times without penalties in chip area and power consumption.

2 Mismatch Error

2.1 Quantization & Shannon Limit

Data quantization is the partition of a continuous -dimensional vector space into subspaces, , called quantization regions as illustrated in Figure 1. For example, an eye is a two-dimensional biological quantizer while an ADC is a zero-dimensional artificial quantizer, where the partition occurs in a spatial, temporal and scalar domain. Each quantization region is assigned a representative value, , which uniquely encodes the quantized information. While the representative values are well-defined in the abstract domain, the actual partition often depends on the physical properties of the quantization device and has a limited degree of freedom for adjustment. An optimal data conversation is achieved with a set of uniformly distributed quantization regions. In practice, it is difficult to achieve due to the physical constraints in the partition process. For example, individual pixel cells can deviate from the ideal morphology, location, and sensitivity. These relative differences, referred to as mismatch error, contribute to the data conversion error.

Figure 1: Illustration of -dimensional quantizers without (ideal) and with mismatch error. (a) Two-dimensional quantizers for image sensing. (b) Zero-dimensional quantizers for analog-to-digital data conversion.
Figure 2: (a) Degeneration of entropy, i.e. maximum effective resolution, due to mismatch error versus quantizer’s intrinsic resolution. (b) The proportion of data conversion error measured by mismatch-to-quantization ratio (MQR). With a conventional architecture, mismatch error is the dominant source, especially in a high-resolution domain. The proposed method allows suppressing mismatch error below quantization noise and approaching the Shannon limit.

In this paper, we consider a zero-dimensional (scalar) quantizer, which is the mathematical equivalence of an ADC device. A -bit quantizer divides the continuous conversion full-range () into quantization regions, , with nominal unity length least-significant-bit (LSB). The quantization regions are defined by a set of discrete references111 is a dummy reference to define the conversion full-range., , where . An input signal is assigned the digital code , if it falls into region defined by

(1)

The Shannon entropy of a -bit quantizer [18, 19] quantifies the maximum amount of information that can be acquired by the data conversion process

(2)

where is the normalized total mean square error integrated over each digital code

(3)

In this work, we consider both quantization noise and mismatch error. The Shannon limit is generally preferred as the maximum rate at which information can be acquired without any mismatch error, where or , is equal to the total quantization noise , and the entropy is equal to the quantizer’s intrinsic resolution . The differences between and are caused by mismatch error and result in the degeneration of entropy. Figure 2(a) shows the entropy, i.e. maximum effective resolution, versus the quantizer’s intrinsic resolution with fixed mismatch ratios and . Figure 2(b) describes the proportion of error contributed by each source, as measured by mismatch-to-quantization ratio (MQR)

(4)

It is evident that at a high resolution, mismatch error is the dominant source causing data conversion error. The Shannon theory implies that mismatch error is the fundamental problem relating to the physical distribution of the reference set. [20, 21] have proposed post-conversion calibration methods, which are ineffective in removing mismatch error without altering the reference set itself. A standard workaround solution is using larger components thus better matching characteristics; however, this incurs penalties concerning cost and power consumption. As a rule of thumb, 1-bit increase in resolution requires a 4-time increase of resources [15]. To further advance the system performance, a design solution that is robust to mismatch error must be realized.

2.2 Mismatch Error Model

For artificial systems, binary coding is popularly used to encode the reference set. It involves partitioning the array of unit cells into a set of binary-weighted components , and assembling different components in to form the needed references. The precision of the data conversion is related to the precise matching of these unit cells, which can be in forms of comparators, capacitors, resistors, or transistors, etc. Due to fabrication variations, undesirable parasitics, and environmental interference, each unit cell follows a probabilistic distribution which is the basis of mismatch error. We consider the situation where the distribution of mismatch error is known as a priori. Each unit cell, , is assumed to be normally distributed with mismatch ratio : . is then a collection of the binary-weighted components , each has independent and identically distributed unit cells

(5)

Each reference is associated with a unique assembly of the components222The dummy reference is exempted. Other references are normalized over the total weight to define the conversion full-range of

(6)

where is the power set of . Binary coding allows the shortest data length to encode the references: control signals are required to generate elements of . However, because each reference is bijectively associated with an assembly of components, it is not possible to rectify the mismatch error due to the random distribution of the components’ weight without physically altering the components themselves.

Figure 3: Simulated distribution of mismatch error in terms of (a) expected absolute error and (b) expected differential error in a 16-bit quantizer with 10% mismatch ratio. (c, d) Optimal mismatch error distribution in the proposed strategy. At the maximum redundancy , mismatch error becomes negligible.

The error density function defined as quantifies the mismatch error at each digital code. Figure 3(a) shows the distribution of at 10% mismatch ratio through Monte Carlo simulations, where there is noticeably larger error associating with middle-range codes. In fact, it can be shown that if unit cells are independent, identically distributed, approximates a normal distribution as follows

(7)

where () is the binary representation of .

Another drawback of binary coding is that it can create differential “gap” between the references. Figure 3(b) presents the estimated distribution of differential gap at 10 mismatch ratio. When the gap exceeds two unit-length, signals that should be mapped to two or multiple codes collapse into a single code, resulting in a loss of information. This phenomenon is commonly known as wide code, an unrecoverable situation by any post-conversion calibration methods. Also, wide gaps tend to appear at two adjacent codes that have large Hamming distance, e.g. and . Subsequently, the amount of information loss can be signal dependent and amplified at certain parts of data conversation range.

3 Proposed Strategy

Figure 4: Associating and exchanging the information between individual pixels in the same field of vision generate an exponential number of combinations and allow efficient spatial data acquisition beyond physical constraints. Inspired by this process, we propose a redundant sensing strategy that involves blending components between two imperfect sets to gain extra precision.

The proposed general strategy is to incorporate redundancy into the quantization process such that one reference can be generated by a large number of distinct component assemblies , each yields a different amount of mismatch. Among numerous options that lead to the same goal, the optimal reference set is the collection of assemblies with the least mismatch error over every digital code.

Furthermore, we propose that such redundant characteristic can be achieved by resembling the visual systems’ binocular structure. It involves a secondary component set that has overlapping weights with the primary component set. By exchanging the components with similar weights between the two sets, excessive redundant component assemblies can be realized. We hypothesize that a similar mechanism may have been employed in the brain that allows associating information between individual pixels on the same field of vision in each eye as illustrated in Figure 4. Because such association creates an exponential number of combinations, even a small percentage of 100 million photoreceptors and 1.5 million retinal ganglion cells that are “interchangeable” could result in a significant degree of redundancy.

The design of the primary and secondary component set, and , specifies the level and distribution of redundancy. Specifically, is derived by subtracting from the conventional binary-weighted set , while the remainders form the primary component set . The total nominal weight remains unchanged as , where is the resolution of the quantizer as well as the primary component set. It is worth mentioning that mismatch error is mostly contributed by the most-significant-bit (MSB) rather than the least-significant-bit (LSB) as implied by Equation (5). Subsequently, to optimize the level and distribution of redundancy, the secondary set should advantageously consist of binary-weighted components that are derived from the MSB. and can be described as follows

(8)

where is the resolution of and is a scaling factor satisfying and . Different values of and result in different degree and distribution of redundancy. Any design within this framework can be represented by its unique geometrical identity: . The total number of components assemblies is , which is much greater than the cardinality of the reference-set , thus implies the high level of intrinsic redundancy.

is defined as the number of assemblies that represent the same reference and is an essential indicator that specifies the redundancy distribution

(9)

Figure 5(a) shows versus digital codes with and multiple combinations of (). The design of should generate more options for middle-range codes, which suffer from larger mismatch error. Simulations suggest decides the total number of assemblies, ; defines the morphology of the redundancy distribution. A larger value of gives a more spreading distribution.

Figure 5: The distribution of the number of assemblies with different geometrical identity in (a) 2-component-set design and (b) 3-component-set design. Higher assembly count, i.e., larger level of redundancy, is allocated for digital codes with larger mismatch error.

Removing mismatch error is equivalent to searching for the optimal component assembly that generates the reference with the least amount of mismatch

(10)

The optimal reference set is then the collection of all references generated by . In this work, we do not attempt to find as it is an NP-optimization problem with the complexity of that may not have a solution in the polynomial space. Instead, this section focuses on showing the achievable precision with the proposed architecture while section 4 will describe a heuristic approach. The simulation results in Figure 2(b) demonstrate our technique can suppress mismatch error below quantization noise, thus approaching the Shannon limit even at high resolution and large mismatch ratio. In this simulation, the secondary set is chosen as for maximum redundancy. Figure 3(c, d) shows the distribution of mismatch error after correction. Even at the minimum redundancy (), a significant degree of mismatch is rectified. At the maximum redundancy (), the mismatch error becomes negligible compared with quantization noise.

Based on the same principles, a -set components design () can be realized, which gives an increased level redundancy and more complex distribution as shown in Figure 5(b), where and the geometrical identity is . With different combinations of and (), can be catered to a known mismatch error distribution and yield a better performance. However, adding more component set(s) can increase the computational burden as the complexity increases rapidly with every additional set(s): . Given mismatch error can be well rectified with a two-set implementation over a wide range of resolution, might be unnecessary.

Similarly, three or more eyes may give better vision. However, the brain circuits and control network would become much more complicated to integrate signals and information. In fact, stereopsis is an advanced feature to human and animals with well-developed neural capacity [8]. Despite possessing two eyes, many reptiles, fishes and other mammals, have their eyes located on the opposite sides of the head, which limits the overlapping region thus stereopsis, in exchange for a wider field of vision. Certain species of insect such as Arachnids can possess from six to eight eyes. However, studies have pointed out that their eyes do not function in synchronous to resolve the fine resolution details [22]. It is not a coincidence that at least 30% of the human brain cortex is directly or indirectly involved in processing visual data [8]. We conjecture that the computational limitation is a major reason that many higher-order animals are evolved to have two eyes, thus keep the cyclops and triclops remain in the realm of mythology. No less as it would sacrifice visual processing precision, yet no more as it would overload the brain’s circuit complexity.

4 Practical Implementation & Results

A mixed-signal ADC integrated circuit has been designed and fabricated to demonstrate the feasibility of the proposed architecture. The nature of hardware implementation limits the deployment of sophisticated learning algorithms. Instead, the circuit relies on a heuristic approach to efficiently estimate the mismatch error and adaptively reconfigure its components in an unsupervised manner. The detailed hardware algorithm and circuits implementation are presented seperately. In this paper, we only briefly summarize the techniques and results.

The ADC design is based on successive-approximation register (SAR) architecture and features redundant sensing with a geometrical identity . The component set is a binary-weighted capacitor array. We have chosen the smallest capacitance available in the CMOS process to implement the unit cell for reducing circuits power and area. However, it introduces large capacitor mismatch ratios up to 5% which limits the effective resolution to 10-bit or below for previous works reported in the literature [15, 20, 21].

Figure 6: High-resolution ADC implementation. (a) Monte Carlo simulations of the unsupervised error estimation and calibration technique. (b) The chip micrograph. (c) Differential nonlinearity (DNL) and (d) integral nonlinearity (INL) measurement results.

The resolution of the secondary array is chosen as to maximize the exchange capacity between two component sets

(11)

In the auto-calibration mode, the mismatch error of each component is estimated by comparing the capacitors with similar nominal values implied by Equation (13). The procedure is unsupervised and fully automatic. The result is a reduced dimensional set of parameters that characterize the distribution of mismatch error. In the data conversion mode, a heuristic algorithm is employed that utilizes the estimated parameters to generate the component assembly with near-minimal mismatch error for each reference. A key technique is to shift the capacitor utilization towards the MSB by exchanging the components with similar weight, then to compensate the left-over error using the LSB. Although the algorithm has the complexity of , parallel implementation allows the computation to finish within a single clock cycle.

By assuming the LSB components contribute an insignificant level of mismatch error as implied by Equation (5), this heuristic approach trades accuracy for speed. However, the excessive amount of redundancy guarantees the convergence of an adequate near-optimal solution. Figure 6(a) shows simulated plots of effective-number-of-bits (ENOB) versus unit-capacitor mismatch ratio, . With the proposed method, the effective resolution is shown to approach the Shannon limit even with large mismatch ratios. It is worth mentioning that we also take the mismatch error associated with the bridge-capacitor, , into consideration. Figure 6(b) shows the chip micrograph. Figure 6(c, d) gives the measurement results of standard ADC performance merit in terms of differential nonlinearity (DNL) and integral nonlinearity (INL). The results demonstrate that a 4-6 fold increase of linearity is feasible.

5 Conclusion

This work presents a redundant sensing architecture inspired by the binocular structure of the human visual system. We show architectural advantages of using redundant sensing in removing mismatch error and enhancing sensing precision. A high resolution, zero-dimensional data quantizer is presented as a proof-of-concept demonstration. Through Monte Carlo simulation with the error probabilistic distribution as a priori, we find the precision can approach the Shannon limit. In actual measurements without knowing the error probabilistic distribution, the gain of extra 2-bit precision and 4-6 times linearity is observed. We envision that the framework can be generalized to handle higher dimensional data and apply to a variety of applications such as digital imaging, functional magnetic resonance imaging (fMRI), 3D data acquisition, etc. Moreover, engineering such bio-inspired artificial systems may help better understand the biological processes such as stereopsis, microsaccade, and hyperacuity.

Acknowledgment

The authors would like to thank Phan Minh Nguyen for his valuable comments.

References

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Appendix

This appendix presents the detailed implementation of a high-resolution analog-to-digital converter (ADC) in integrated circuits as mentioned in Section 4 “Practical Implementation & Results”

Appendix A Component Sets

The ADC design utilizes a special case of the proposed redundant sensing architecture: and , which results in two component sets with nominal weights as follows

(12)

The components are implemented using unit capacitors with the mean capacitance of fF and the effective mismatch ratio of 2-3%. We refer to the design as the “half-split” capacitor array since it is equivalent to dividing each conventional binary-weighted component into two identical halves

(13)

where . The relative mismatch error of each component and is defined as

(14)

where . By definition, the sum of all relative mismatch errors is equal to zero

(15)

Appendix B SAR ADC Architecture

The functional block diagram of the ADC implementation is presented in Figure A1. The device has two “half-split” capacitor arrays in the differential configuration, a comparator, an on-chip memory and digital logic blocks. Each capacitor array is divided into three sections: MSB, LSB, and sub-DAC using the split-capacitor technique to reduce the total capacitance. The sub-DAC section is only used to fine-tune the error estimation procedure and represents during normal conversion. The primary logic blocks are composed of the conventional successive-approximation register (SAR) logic and the proposed capacitor mismatches estimation and calibration logic.

Figure A1: Functional block diagram of the SAR ADC implementation.

The circuit operations are comprised of two phases: the foreground error estimation and the normal conversion with background calibration. The error estimation procedures are engaged when the device is reset, in which capacitor mismatches are automatically obtained and stored in the on-chip memory. The error estimation procedures only need to be performed once and take less than 10ms at 40kHz sampling rate. During the succeeding normal conversion phase, the calibration logic utilizes the estimated mismatches to generate the near-optimal component assemblies in real-time and adaptive to each input signal.

Appendix C Capacitor Mismatches Estimation

The capacitor mismatches estimation is a mixed-signal process that automatically obtains the mismatches of all components. The key technique involves comparing and resolving the weight differences among consecutive components using charge-redistribution procedures. Because the mismatch error increases exponentially from LSB to MSB, the smallest LSB component, i.e. , can be used as the reference to obtain the relative mismatches of the others.

The process is carried out in multiple iterations, each produces the mismatch of a component starting from LSB to MSB. At the beginning of an iteration, one of the differential capacitor arrays generates a voltage to counteract the comparator offset, while the capacitor comparison is performed on the other array. The ADC actually operates in the single-ended configuration during error estimation. The mismatches are obtained by evaluating the difference () between () and their preceding bit-capacitors

(16)

where . Due to the relationship between components specified in Equation 13, () should have a zero-mean and a standard deviation proportional to the mismatch error.

The charge redistribution process is described in Figure A2 where and represent the positive, negative and common-mode reference voltage respectively. The voltage generated on the top-plate is proportional to the difference

(17)

is digitized with the remaining components from to (, ) by switching the bottom-plates to either or . The 4-bit sub-DAC array is used for fine resolving of and with the maximum precision of LSB.

After all and are resolved, the pre-estimated mismatches and are obtained by integrating the differences in a recursive manner.

(18)

where . There is systematic bias in values of and due to the assumption that . This bias can be corrected by exploiting the property specified in Equation 15. The final estimated mismatches and are obtained as follows

(19)

where and

(20)

The estimated mismatches are stored in the on-chip memory as 10-bit fix-point numbers with a 6-digit integer. The result is a reduced-dimensional set of parameters that fully characterizes the mismatch error of capacitor arrays while only occupies a memory space of 480-bit.

Figure A2: The mixed-signal process to estimate capacitor mismatches based on charge-redistribution procedures.

Appendix D Capacitor Mismatches Calibration

Figure A3(a) illustrates the calibration logic which operates in the background during normal data conversion. It is a heuristic algorithm that searches for the near-optimal component assembly to generate the required reference having the minimal error. The algorithm is designed to be efficient and can be implemented in a parallel structure such that the component assembly is recalculated within a single clock cycle, i.e. .

Figure A3: (a) Illustration of the on-chip capacitor mismatches calibration algorithm. (b) “Mapping & shifting” logic effectively migrates the component assembly towards the MSBs.

The calibration algorithm consists of two phases: “mapping and shifting” and residual error compensation. The first phase maps the digital code to the component assembly without considering the mismatch error while utilizing as much as possible as illustrated in Figure A3(b). The algorithm effectively migrates the component utilization towards the MSBs, leaving the many idle components in which can be used to compensate the residual error in the later stage.

The second phase involves computing the residual mismatches using the estimated parameters stored in the on-chip memory

(21)

where are the digital digits associated with components in , and generated from the output of the first phase. It is worth noting that the algorithm also compensates the comparator offset . The binary representation of the residual mismatches is then directly mapped to an assembly of the idle component in and is effectively compensated. Because the value of cannot exceed tens of LSB, the first 6 LSB components () are sufficient, which mismatches are small enough to be neglected. It should be mentioned that some LSB components in could be already utilized from the first phase, thus are unavailable for residual error compensation. However, these scenarios only occur at digital codes near , in which the mismatch error is sufficiently small. The Monte Carlo simulation results presented in the main paper have indicated that the residual mismatches can be effectively compensated in almost all situations.

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